參數(shù)資料
型號： TRCV012G7
廠商： Lineage Power
元件分類： 運動控制電子
英文描述： Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer(2.5 Gbits/s and 2.7 Gbits/s)(限幅放大器，時鐘恢復，1：16數(shù)據(jù)多路分解器(2.5 G位/秒和 2.7 G位/秒))
中文描述： 限幅放大器，時鐘恢復，1:16數(shù)據(jù)復用器（2.5 Gb /秒和2.7 Gb /秒）（限幅放大器，時鐘恢復，1:16數(shù)據(jù)多路分解器（2.5摹位/秒和2.7克位/秒））
文件頁數(shù)： 15/28頁
文件大?。?/td> 500K
代理商： TRCV012G7
Preliminary Data Sheet
August 2000
TRCV012G5 and TRCV012G7
Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer
15
Lucent Technologies Inc.
Decision Circuit—Adjustable Sampling Time (ASTREF, AST[4:0])
The adjustable sampling time (AST) feature allows a deliberate time offset to be introduced for the data recovery
sampling instant relative to the recovered clock. The sampling instant is normally set by the clock recovery phase-
locked loop (PLL) to be midway between the mean values of adjacent NRZ data polarity transitions, which pro-
vides an ideal setup and hold time margin of one half the data period. By setting the AST[4:0] control bits, the user
may shift the instant at which the PLL’s recovered clock samples the receive data eye. The AST[4] bit acts as a
polarity setting, AST[3] represents the most significant magnitude bit, and AST[0] represents the least significant
magnitude bit. Since this results in two decoded zero time offset states, AST[4:0] = 00000 is used to disable the
sampling offset feature entirely and will result in traditionally defined midpoint sampling, whereas AST[4:0] = 10000
will also result in midpoint sampling by using the AST feature in its zero time offset condition. With AST[4] set to a
logic high, increasing the AST[3:0] hexadecimal code causes the sampling point to monotonically advance in time;
with AST[4] set to a logic low, the sample time is delayed more as AST[3:0] increases. The ASTREF pin should be
tied to the positive power supply through a low-capacitance 1%, 2.1 k
resistor. This provides a stable reference
resistor to the AST circuitry
.
The AST control bit configurations and corresponding offset times are shown in Table 7
.
Table 7. Adjustable Sampling Time (AST) Control Code
Note:
When operating the TRCV012G7 at the FEC rate, the 6.25 ps
step should be scaled down by 7%.
AST[4:0]
Time Offset
(ps)
AST[4:0]
Time Offset
(ps)
01111
–93.75
10000
0.00
01110
–87.50
10001
6.25
01101
–81.25
10010
12.50
01100
–75.00
10011
18.75
01011
–68.75
10100
25.00
01010
–62.50
10101
31.25
01001
–56.25
10110
37.50
01000
–50.00
10111
43.75
00111
–43.75
11000
50.00
00110
–37.50
11001
56.25
00101
–31.25
11010
62.50
00100
–25.00
11011
68.75
00011
–18.75
11100
75.00
00010
–12.50
11101
81.25
00001
–6.25
11110
87.50
00000
0.00
11111
93.75
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