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參數(shù)資料
| 型號： | TQ5635 |
| 廠商： | TRIQUINT SEMICONDUCTOR INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | 3 V PCS LNA/Mixer Receiver IC |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQCC16 |
| 封裝： | 3 X 3 MM, PLASTIC, QFN-16 |
| 文件頁數(shù)： | 22/25頁 |
| 文件大?。?/td> | 218K |
| 代理商： | TQ5635 |
TQ5635
Data Sheet
22
For additional information and latest specifications, see our website:
www.triquint.com
Package Pinout:
GND
GND
RF In
GND
LNA
Bias
MXR In
IF Out
GIC
GND
LO
In
GND/LNA
Gain
LNA Out
LO
Vdd
Mixer
Vdd
LNA Vdd
Mixer
IF Amp
LO Buffer
1
active
bias
LNA
GND/LNA
Gain
Active
Bias
Pin Descriptions:
Pin #
1
Pin Name
GND
Description and Usage
Ground connection. Connect as closely as possible to ground or to package paddle ground.
2
LNA IN
LNA RF input (DC blocked internally). An external match is required which can be chosen for a gain/NF
trade-off.
3
GND
Ground connection. Connect as closely as possible to ground or to package paddle ground.
4
LNA BIAS
An external resistor is connected between this pin and Vdd in order to set the LNA bias current. A value of
~ 2.5 KOhmwill give an LNA IDD of ~ 7 mA.
5
LNA VDD
LNA supply voltage. An external decoupling/bypass network should be used.
6
GND
Ground connection. Connect as closely as possible to ground or to package paddle ground.
7
IF OUT
Mxer IF output (~ 500 Ohm open drain). Connection to Vdd required. External matching required.
8
IF BIAS
IF amp FET source. An RF by-passed resistor is placed formthis pin to ground in order to set the current in
this stage.
9
LO IN
Mxer LO input (DC blocked internally). Internally matched to ~ 50 Ohms.
10
LO TUNE
Mxer LO buffer supply voltage. An external bypass capacitor required. An external series inductor is
required for peaking LO gain.
11
GND
Ground connection. Connect as closely as possible to ground or to package paddle ground.
12
MXR IN
Mxer RF input (DC blocked internally). Anexternal matching network is recommended to optimzed
cascaded IIP3
13
MXR Vdd
Supply voltage for the internal bias circuit that sets IF amp current (in conjunction with the external IF BIAS
resistor).
14
LNA OUT
LNA RF output. It is DC blocked and internally matched to better than 2:1.
15, 16
LNA SOURCE
The source node of the cascade LNA section. A hard ground provides maximumgain and mnimumIIP3. A
small amount of external inductance will reduce gain and improve IIP3.
Paddle
GND
Ground connection. It is very important to place multiple via holes under the paddle. Provides RF
grounding for the part.
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