參數(shù)資料
型號(hào)： TPS9104PT
廠商： Texas Instruments, Inc.
英文描述： CELLULAR SUBSCRIBER TERMINAL POWER SUPPLY/AUDIO SYSTEM
中文描述： 移動(dòng)用戶終端電源/音頻系統(tǒng)
文件頁(yè)數(shù)： 5/33頁(yè)
文件大?。?/td> 557K
代理商： TPS9104PT
TPS9104
CELLULAR SUBSCRIBER TERMINAL
POWER SUPPLY/AUDIO SYSTEM
SLVS133A – AUGUST 1996 – REVISED APRIL 1998
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description
voltage reference
The regulators and reset generator utilize an internal 1.185-V band-gap voltage reference. The reference is also
buffered and brought out on REF for external use; REF can source a maximum of 2 mA. A 0.01-
μ
F to 0.1-
μ
F
capacitor must be connected between REF and ground.
LDO regulators
The TPS 9104 includes three low-dropout regulators, implemented with 1-
PMOS series-pass transistors, with
quiescent supply currents of 100
μ
A. Each of the regulators can supply up to 100 mA of continuous output
current. The 1-
PMOS series-pass transistor achieves the dropout voltage of just 100 mV at the maximum
rated output current. Each regulator output voltage can be independently programmed to either 3.3 V or 3 V
using its programming control input PL, PA or PB (Px). A logic low on Px sets the output voltage of the regulator
to 3.3 V; a logic high sets it to 3 V.
Each LDO contains a current limit circuit. When the current demand on the regulator exceeds the current limit,
the output voltage drops in proportion to the excess current. When the excess load current is removed, the
output voltage returns to regulation. Exceeding the current limit on VL can disable the TPS9104. If enough
current demand is placed on VL, the output voltage drops below the reset threshold voltage causing RESET
to go low, effectively unlatching the enable.
VL is intended to be the primary supply voltage for the microprocessor and other system logic functions. VA and
VB can be used to power low-noise analog circuits and/or implement system power management. The enable
terminals EN_A and EN_B are utilized to power down circuitry when it is not required. EN_A and EN_B are
TTL-compatible inputs with 10-
μ
A active current-source pullups. A logic low enables the respective regulator
while a logic high pulls the regulator output voltage to ground and reduces the regulator quiescent current to
leakage levels. Both EN_A and EN_B are not active until RESET is logic high.
Stability of the LDOs is ensured by the addition of compensation terminals CL, CA, and CB, which connect to
the output of the regulator through an internal 1-
resistor. This compensation scheme allows for capacitors
with equivalent series resistance (ESR) of up to 15
, eliminating the need for expensive, low-ESR capacitors.
reset generator
RESET is a microprocessor reset signal that goes to logic low at power-up, or whenever VL drops below 2.93 V
(2.6 V for 3-V applications), and remains in that state for 250 ms after VL exceeds the RESET threshold (see
Figure 5). The open-drain output has a 30-
μ
A pullup that eliminates the need for an external pullup resistor and
still allows it to be connected with other open-drain or open-collector signals. RESET is valid for supply voltages
as low as 1.5 V.
ON, OFF, ON, ON_REM and EN functions
The ON input is intended to be the main enable for the TPS9104 and should be connected to ground through
a push-button switch. Once the switch is pressed, internal logic pulls EN low. The EN terminal is designed to
sink 3.2 mA and can be used as a pulldown to enable other functions on the TPS9104 or other system circuitry.
When EN is pulled low, the TPS9104 checks to make sure the supply voltage is above the UVLO threshold
voltage and the die temperature is below 160
°
C. If both of these conditions are met, the reference circuitry,
regulator L, reset generator, and other support circuitry are enabled. When RESET goes high, the system can
respond with a logic high on OFF, which latches the TPS9104 on, and the ON push button can then be released.
The TPS9104 is disabled in a similar manner. If the ON push button is pressed while the TPS9104 is enabled,
the ON signal responds with a logic high. Once this logic high is detected, the system can respond with a logic
low on OFF, disabling the TPS9104 and reducing supply currents to 1
μ
A (see Figure 1).
相關(guān)PDF資料
PDF描述
TPS9104Y CELLULAR SUBSCRIBER TERMINAL POWER SUPPLY/AUDIO SYSTEM
TPS9125PW 5 V/3 V SIM SUPPLY AND LEVEL SHIFTERS
TPV375 14 pin DIP, 5.0 Volt, HCMOS/TTL, Clock Oscillator
TPV376 14 pin DIP, 5.0 Volt, HCMOS/TTL, Clock Oscillator
TPV385 14 pin DIP, 5.0 Volt, HCMOS/TTL, Clock Oscillator
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TPS9104Y 制造商:TI 制造商全稱:Texas Instruments 功能描述:CELLULAR SUBSCRIBER TERMINAL POWER SUPPLY/AUDIO SYSTEM
TPS9110 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Cellular Subscriber Terminal Power Supply
TPS9110IPWLE 制造商:TI 制造商全稱:Texas Instruments 功能描述:CELLULAR SUBSCRIBER TERMINAL POWER SUPPLY
TPS9110IPWR 制造商:Rochester Electronics LLC 功能描述:- Bulk
TPS9111 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Cellular Subscriber Terminal Power Supply
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*