參數(shù)資料
型號: TPS7350QPW
廠商: Texas Instruments, Inc.
元件分類: 基準電壓源/電流源
英文描述: LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
中文描述: 低技術(shù),集成延遲復(fù)位功能降穩(wěn)壓器
文件頁數(shù): 6/43頁
文件大小: 638K
代理商: TPS7350QPW
TPS7301Q, TPS7325Q, TPS7330Q, TPS7333Q, TPS7348Q, TPS7350Q
LOW-DROPOUT VOLTAGE REGULATORS
WITH INTEGRATED DELAYED RESET FUNCTION
SLVS124F – JUNE 1995 – REVISED JANUARY 1999
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
MIN
2.47
MAX
UNIT
TPS7301Q
10
V
TPS7325Q
3.1
10
Input voltage VI
TPS7330Q
3.5
10
V
Input voltage, VI
TPS7333Q
3.77
10
TPS7348Q
5.2
10
V
TPS7350Q
5.33
10
High-level input voltage at EN, VIH
Low-level input voltage at EN, VIL
Output current range, IO
Operating virtual junction temperature range, TJ
Minimum input voltage defined in the recommended operating conditions is the maximum specified output voltage plus dropout voltage, VDO,
at the maximum specified load range. Since dropout voltage is a function of output current, the usable range can be extended for lighter loads.
To calculate the minimum input voltage for the maximum load current used in a given application, use the following equation:
VI(min)
Because the TPS7301 s programmable, rDS(on) should be used to calculate VDO before applying the above equation. The equation for calculating
VDO from rDS(on) is given in Note 2 in the TPS7301 electrical characteristics table. The minimum value of 2.97 V is the absolute lower limit for
the recommended input voltage range for the TPS7301.
2
V
0.5
V
0
500
mA
°
C
–40
125
VO(max)
VDO(max load)
相關(guān)PDF資料
PDF描述
TPS7301Q LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
TPS7330Q LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
TPS7330Y LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
TPS7333Q LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
TPS7348Q LOW-DROPOUT VOLTAGE REGULATORS WITH INTEGRATED DELAYED RESET FUNCTION
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