參數(shù)資料
型號(hào)： TPS73215DBVTG4
廠商： Texas Instruments, Inc.
元件分類： 基準(zhǔn)電壓源/電流源
英文描述： Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection
中文描述： 無(wú)電容，NMOS管，150mA的低壓差穩(wěn)壓器的反向電流保護(hù)
文件頁(yè)數(shù)： 11/23頁(yè)
文件大?。?/td> 663K
代理商： TPS73215DBVTG4
www.ti.com
APPLICATION INFORMATION
INPUT AND OUTPUT CAPACITOR
REQUIREMENTS
Although an input capacitor is not required for
stability, it is good analog design practice to connect
a 0.1μF to 1μF low ESR capacitor across the input
supply near the regulator. This counteracts reactive
input sources and improves transient response,
noise rejection, and ripple rejection. A higher-value
capacitor may be necessary if large, fast rise-time
load transients are anticipated or the device is
located several inches from the power source.
TPS732xx
GND
EN
NR
IN
OUT
V
IN
V
OUT
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
Optional bypass
capacitor to reduce
output noise.
OUTPUT NOISE
A precision band-gap reference is used to generate
the internal reference voltage, V
REF
. This reference is
the dominant noise source within the TPS732xx and
it generates
approximately
100kHz) at the reference output (NR). The regulator
control loop gains up the reference noise with the
same gain as the reference voltage, so that the noise
voltage of the regulator is approximately given by:
V
N
32 V
RMS
(R
1
R
2
)
R
2
32 V
RMS
V
OUT
V
REF
(1)
TPS732xx
GND
EN
FB
IN
OUT
V
IN
V
OUT
V
OUT
=
×
1.204
(R
1
+ R
2
)
R
1
R
1
C
FB
R
2
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional output capacitor.
May improve load transient,
noise, or PSRR.
Optional capacitor
reduces output noise
and improves
transient response.
V
N
( V
RMS
)
27
V
RMS
V
V
OUT
(V)
(2)
TPS732xx
SBVS037I–AUGUST 2003–REVISED MAY 2006
in addition to the internal 8k
resistor, presents the
same impedance to the error amp as the 27k
bandgap reference output. This impedance helps
compensate
for
leakages
terminals.
The TPS732xx belongs to a family of new generation
LDO regulators that use an NMOS pass transistor to
achieve
ultra-low-dropout
current blockage, and freedom from output capacitor
constraints. These features, combined with low noise
and an enable input, make the TPS732xx ideal for
portable applications. This regulator family offers a
wide selection of fixed output voltage versions and
an adjustable output version. All versions have
thermal
and
over-current
foldback current limit.
performance,
reverse
into
the
error
amp
protection,
including
Figure 31
shows the basic circuit connections for the
fixed
voltage
models.
connections
for
the
adjustable
(TPS73201).
Figure
32
output
gives
the
version
The TPS732xx does not require an output capacitor
for stability and has maximum phase margin with no
capacitor. It is designed to be stable for all available
types and values of capacitors. In applications where
V
IN
- V
OUT
< 0.5V and multiple low ESR capacitors
are in parallel, ringing may occur when the product of
C
OUT
and total ESR drops below 50n
F. Total ESR
includes all parasitic resistances, including capacitor
ESR and board, socket, and solder joint resistance.
In most applications, the sum of capacitor ESR and
trace resistance will meet this requirement.
Figure 31. Typical Application Circuit for
Fixed-Voltage Versions
32μVRMS
(10Hz
to
Since the value of V
REF
is 1.2V, this relationship
reduces to:
Figure 32. Typical Application Circuit for
Adjustable-Voltage Versions
for the case of no C
NR
.
An internal 27k
resistor in series with the noise
reduction pin (NR) forms a low-pass filter for the
voltage reference when an external noise reduction
capacitor, C
NR
, is connected from NR to ground. For
C
NR
= 10nF, the total noise in the 10Hz to 100kHz
bandwidth is reduced by a factor of ~3.2, giving the
approximate relationship:
R
and R
can be calculated for any output voltage
using the formula shown in
Figure 32
. Sample
resistor values for common output voltages are
shown in
Figure 2
.
For best accuracy, make the parallel combination of
R
1
and R
2
approximately euqal to 19k
. This 19k
,
11
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