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參數(shù)資料
| 型號(hào)： | TPS63002DRCT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 2 A SWITCHING REGULATOR, 1500 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | 3 X 3 MM, GREEN, PLASTIC, SON-10 |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 645K |
| 代理商： | TPS63002DRCT |
C
OUT + 5
L
mF
mH
(7)
LAYOUT CONSIDERATIONS
THERMAL INFORMATION
P
D(MAX) +
T
J(MAX) *
T
A
R
qJA
+
125
°C * 85°C
48.7
°C W +
820 mW
(8)
SLVS520B – MARCH 2006 – REVISED JULY 2008........................................................................................................................................................... www.ti.com
A capacitor with a value in the range of the calculated minimum should be used. This is required to maintain
control loop stability. There are no additional requirements regarding minimum ESR. There is also no upper limit
for the output capacitance value. Larger capacitors will cause lower output voltage ripple as well as lower output
voltage drop during load transients.
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, it is recommended to use short traces as well, separated from the power ground traces. This
avoids ground shift problems, which can occur due to superimposition of power ground current and control
ground current.
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below.
Improving the power dissipation capability of the PCB design
Improving the thermal coupling of the component to the PCB by soldering the PowerPAD
Introducing airflow in the system
The maximum recommended junction temperature (TJ) of the TPS6300x devices is 125°C. The thermal
resistance of the 10-pin QFN 3 × 3 package (DRC) is RθJA = 48.7°C/W, if the PowerPAD is soldered. Specified
regulator operation is assured to a maximum ambient temperature TA of 85°C. Therefore, the maximum power
dissipation is about 820mW, as calculated in Equation 8. More power can be dissipated if the maximum ambient
temperature of the application is lower.
16
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS63000 TPS63001 TPS63002
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| TPS63010YFFT | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 Hi Eff Sgl Inductor Buck-Boost Cnvrtr RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
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