
www.ti.com
TPS60251
SLVS767–APRIL 2007
ELECTRICAL CHARACTERISTICS (continued)
V
I
= 3.5 V, T
A
= –40
°
C to 85
°
C, R
IS
= 562 k
, typical values are at T
A
= 25
°
C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
UVLO2
V
hys
V
ENA_H
V
ENA_L
UVLO Threshold voltage2
(2)
V
I
falling
UVLO1
1.2
1.3
1.5
V
Under-voltage lockout hysterisis
210
mV
Enable high threshold voltage
1.5
V
I
V
Enable low threshold voltage
0.4
V
V
I
= 3 V, C
= 1
μ
F,
I
MAIN_LED
= 15 mA
×
4
T
S
Soft start time
(3)
0.5
ms
CHARGE PUMP
V
out
F
s
Overvoltage limit
6.5
V
Switching frequency
750
kHz
×
1 Mode, (V
I
– V
O
)/I
O
×
1.5 Mode, (V
I
×
1.5 – V
O
)/I
O
V
I
= 3.0V (I
O
=
120mA)
1.2
R
O
Open loop output impedance
3.5
5.0
CURRENT SINK
Current matching of sub LEDs at light
load condition
(4)
I
SUB_LED
= 100
μ
A
×
2, V
DXX
= 0.4 V
K
m_sub
0
±
2%
I
= 15 mA
×
4,
3.0 V
≤
V
I
≤
4.2 V
I
LED
= 15 mA
Main and Sub Display Current Register =
0
×
01&2(111111),
V
DXX
= 0.2 V
Aux Display Current Register = 0
×
03
(XXXX11), V
DM5
= 0.4 V
3.0V
≤
V
I
≤
6.0V
I
LED
= 100
μ
A
(6)
K
m_main
LED to LED Current matching
(5)
±
1%
±
5%
K
a
Current accuracy
±
6%
Maximum LED current of DM1-4 and
DS1-2
I
D_MS
25.5
mA
I
D_DM5
Maximum LED current of DM5
80
mA
V
IS
IS Pin voltage
1.229
1.254
1.279
V
44.8
Output current to current set ratio sub
LEDs
I
sub
6722
I
LED
= 15 mA
(6)
44.8
I
LED
= 100
μ
A
(6)
Output current to current set ratio main
LEDs
I
main
6722
I
LED
= 15 mA
(6)
I
DM5
Output current to current set ratio DM5
35853
I
LED
= 80 mA
(6)
See
(7)
V
DropOut
LED Drop out voltage
80
120
mV
1
×
Mode to 1.5
×
mode transition
threshold voltage
(8)
V
Falling, 15 mA
×
4 measured on the
lowest V
DXX
Measured as V
I
– (V
O
– V
DXX_MIN
), I
MAIN_LED
= 15
mA
×
4
V
TH_GU
85
100
120
mV
Input voltage hysteresis for 1.5
×
to 1
×
mode transition
V
TH_GD
470
mV
SERIAL INTERFACE TIMING REQUIREMENTS
f
max
t
wH(HIGH)
t
wL(LOW)
t
r
t
f
Clock frequency
400
kHz
Pulse duration, clock high time
600
ns
Pulse duration, clock low time
1300
ns
DATA and CLK rise time
300
ns
DATA and CLK fall time
300
ns
High time (repeated) START
condition(after this period the first clock
pulse is generated)
t
h(STA)
600
ns
Setup time for repeated START
condition
t
su(STA)
600
ns
t
h(DATA)
Data input hold time
0
ns
(2)
(3)
(4)
(5)
(6)
(7)
Shut down completely and come up with all 0's after device restart
Measurement Condition: From enabling the LED driver to 90% output voltage after V
I
is already up.
LED current matching is defined as: (I
– I
AVG_SUB
) / I
AVG_SUB
LED to LED Current Matching is defined as: (I
– I
) / I
See the
Setting the LED Current
section of the data sheet for details on calculating LED current given by dimming step and R
.
Dropout Voltage is defined as V
(WLED Cathode) to GND voltage at which current into the LED drops 10% from the LED current at
V
= 0.2 V, WLED current = 15 mA
×
4.
As V
drops, V
eventually falls below the switchover threshold of 100mV, and TPS60251 switches to 1.5
×
mode. See the
Operating
Principle
section for details about the mode transition thresholds.
(8)
3
Submit Documentation Feedback