- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄220084 > TPS54313MPWPREP (TEXAS INSTRUMENTS INC) 6.5 A SWITCHING REGULATOR, 762 kHz SWITCHING FREQ-MAX, PDSO20 PDF資料下載
參數(shù)資料
| 型號： | TPS54313MPWPREP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 6.5 A SWITCHING REGULATOR, 762 kHz SWITCHING FREQ-MAX, PDSO20 |
| 封裝： | GREEN, PLASTIC, HTSSOP-20 |
| 文件頁數(shù)： | 4/21頁 |
| 文件大?。?/td> | 614K |
| 代理商： | TPS54313MPWPREP |
www.ti.com
Oscillator and PWM Ramp
SWITCHING FREQUENCY +
100 kW
R
500 kHz
(4)
Error Amplifier
PWM Control
SGLS376A – FEBRUARY 2007 – REVISED MARCH 2007
The oscillator frequency can be set to internally fixed values of 350 kHz or 550 kHz using the FSEL pin as a
static digital input. If a different frequency of operation is required for the application, the oscillator frequency can
be externally adjusted from 280 kHz to 700 kHz by connecting a resistor to the RT pin to ground and floating the
FSEL pin. The switching frequency is approximated by the following equation, where R is the resistance from RT
to AGND:
External synchronization of the PWM ramp is possible over the frequency range of 330 kHz to 700 kHz by
driving a synchronization signal into FSEL and connecting a resistor from RT to AGND. Choose an RT resistor
that sets the free-running frequency to 80% of the synchronization signal. Table 1 summarizes the frequency
selection configurations.
Table 1. Summary of the Frequency Selection Configurations
SWITCHING FREQUENCY
FSEL PIN
RT PIN
350 kHz, internally set
Float or AGND
Float
550 kHz, internally set
≥2.5 V
Float
Externally set 280 kHz to 700 kHz
Float
R = 68 k to 180 k
Externally synchronized frequency(1)
Synchronization signal
R = RT value for 80% of external synchronization frequency
(1)
To ensure proper operation when RC filter is used between external clock and FSEL pin, the recommended values are R
≤ 1 k and C
≤ 68 pF.
The high performance, wide bandwidth, voltage error amplifier is gain limited to provide internal compensation of
the control loop. The user is given limited flexibility in choosing output L and C filter components. Inductance
values of 4.7
H to 10 H are typical and available from several vendors. The resulting designs exhibit good
noise and ripple characteristics, along with exceptional transient response. Transient recovery times are typically
in the range of 10
s to 20 s.
Signals from the error amplifier output, oscillator, and current limit circuit are processed by the PWM control
logic. Referring to the internal block diagram, the control logic includes the PWM comparator, OR gate, PWM
latch, and portions of the adaptive dead-time and control logic block. During steady-state operation below the
current limit threshold, the PWM comparator output and oscillator pulse train alternately reset and set the PWM
latch. Once the PWM latch is set, the low-side FET remains on for a minimum duration set by the oscillator
pulse duration. During this period, the PWM ramp discharges rapidly to its valley voltage. When the ramp begins
to charge back up, the low-side FET turns off and high-side FET turns on. As the PWM ramp voltage exceeds
the error amplifier output voltage, the PWM comparator resets the latch, thus turning off the high-side FET and
turning on the low-side FET. The low-side FET remains on until the next oscillator pulse discharges the PWM
ramp.
During transient conditions, the error amplifier output could be below the PWM ramp valley voltage or above the
PWM peak voltage. If the error amplifier is high, the PWM latch is never reset and the high-side FET remains on
until the oscillator pulse signals the control logic to turn the high-side FET off and the low-side FET on. The
device operates at its maximum duty cycle until the output voltage rises to the regulation set-point, setting
VSENSE to approximately the same voltage as Vref. If the error amplifier output is low, the PWM latch is
continually reset and the high-side FET does not turn on. The low-side FET remains on until the VSENSE
voltage decreases to a range that allows the PWM comparator to change states. The TPS54311-16 is capable
of sinking current continuously until the output reaches the regulation set-point.
If the current limit comparator trips for longer than 100 ns, the PWM latch resets before the PWM ramp exceeds
the error amplifier output. The high-side FET turns off and low-side FET turns on to decrease the energy in the
output inductor and consequently the output current. This process is repeated each cycle in which the current
limit comparator is tripped.
12
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TL4050A25IDBZT | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 2.5 V, PDSO3 |
| TL4050B41IDCKT | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 4.096 V, PDSO5 |
| TC54VN5601EMB723 | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PSSO3 |
| TPS62220DDC | 0.88 A SWITCHING REGULATOR, 1850 kHz SWITCHING FREQ-MAX, PDSO5 |
| TS3431AILT | 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 1.24 V, PDSO3 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TPS54313PWP | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 Lo-In Voltage 3A Sync Buck Converter RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| TPS54313PWP | 制造商:Texas Instruments 功能描述:DSP CONTROLLER 制造商:Texas Instruments 功能描述:IC, SYNC BUCK PWM SWITCHER, 20-HTSSOP |
| TPS54313PWPG4 | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 Lo-In Voltage 3A Sync Buck Converter RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| TPS54313PWPR | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 Lo-In Voltage 3A Sync Buck Converter RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
| TPS54313PWPRG4 | 功能描述:直流/直流開關(guān)調(diào)節(jié)器 Lo-In Voltage 3A Sync Buck Converter RoHS:否 制造商:International Rectifier 最大輸入電壓:21 V 開關(guān)頻率:1.5 MHz 輸出電壓:0.5 V to 0.86 V 輸出電流:4 A 輸出端數(shù)量: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFN 4 x 5 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。