
www.ti.com
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
(1) (2)
SLVS632C – JANUARY 2006 – REVISED NOVEMBER 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TJ
INPUT VOLTAGE
OUTPUT VOLTAGE
PACKAGE(1)
PART NUMBER
–40
°C to 125°C
5.5 V to 36 V
Adjustable to 1.22 V
Thermally Enhanced SOIC (DDA)(2)
TPS5430DDA
–40
°C to 125°C
5.5 V to 23 V
Adjustable to 1.22 V
Thermally Enhanced SOIC (DDA)(2)
TPS5431DDA
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
The DDA package is also available taped and reeled. Add an R suffix to the device type (i.e., TPS5430DDAR). See applications section
of data sheet for PowerPAD drawing and layout information.
over operating free-air temperature range (unless otherwise noted) (1)(2)
VALUE
UNIT
VIN
–0.3 to 40(3)
TPS5430
BOOT
–0.3 to 50
PH (steady-state)
–0.6 to 40(3)
VI
Input voltage range
VIN
–0.3 to 25
TPS5431
BOOT
–0.3 to 35
V
PH (steady-state)
–0.6 to 25
ENA
–0.3 to 7
BOOT-PH
10
VSENSE
–0.3 to 3
PH (transient < 10 ns)
–1.2
IO
Source current
PH
Internally Limited
Ilkg
Leakage current
PH
10
A
TJ
Operating virtual junction temperature range
–40 to 150
°C
Tstg
Storage temperature
–65 to 150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltage values are with respect to network ground terminal.
(3)
Approaching the absolute maximum rating for the VIN pin may cause the voltage on the PH pin to exceed the absolute maximum rating.
THERMAL IMPEDANCE
PACKAGE
JUNCTION-TO-AMBIENT
8 Pin DDA (2-layer board with solder)(3)
33
°C/W
8 Pin DDA (4-layer board with solder)(4)
26
°C/W
(1)
Maximum power dissipation may be limited by overcurrent protection.
(2)
Power rating at a specific ambient temperature TA should be determined with a junction temperature of 125°C. This is the point where
distortion starts to substantially increase. Thermal management of the final PCB should strive to keep the junction temperature at or
below 125
°C for best performance and long-term reliability. See Thermal Calculations in applications section of this data sheet for more
information.
(3)
Test board conditions:
a. 3 in x 3 in, 2 layers, thickness: 0.062 inch.
b. 2 oz. copper traces located on the top and bottom of the PCB.
c. 6 thermal vias in the PowerPAD area under the device package.
(4)
Test board conditions:
a. 3 in x 3 in, 4 layers, thickness: 0.062 inch.
b. 2 oz. copper traces located on the top and bottom of the PCB.
c. 2 oz. copper ground planes on the 2 internal layers.
d. 6 thermal vias in the PowerPAD area under the device package.
2