參數(shù)資料
型號(hào): TPS2384PJDG4
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 電源管理
英文描述: 4-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64
封裝: GREEN, PLASTIC, HTQFP-64
文件頁(yè)數(shù): 8/50頁(yè)
文件大?。?/td> 1402K
代理商: TPS2384PJDG4
www.ti.com
AM Power Delivery
AM Faults and INTB Output
SLUS634D – NOVEMBER 2004 – REVISED MARCH 2007
AUTO MODE FUNCTIONAL DESCRIPTION (continued)
After successfully discovery and classification of a valid PD the power is delivered by controlling the current to
the PD until its current requirements are met or until the internal current limit is reached (approximately 425 mA).
The power switch is fully enhanced after 500
s. Figure 5 show the voltage and the current that is being applied
to the PD during power-up and reaching the PD load of 250 mA.
Figure 5.
After power has been applied to the PD the TPS2384 automatically enters the current and voltage sample
mode. The sample mode performs 31 current measurements and 1 voltage measurement. Each measurement
takes approximately 18 ms to complete. The port remains powered and the current/voltage measurement cycle
continues until a fault condition occurs. The current and voltage measurements are both stored in the A/D
current and voltage registers and can be accessed through the I2C pins. This allows power management in the
AM if it is desired.
AM faults are:
Port under and over voltage faults
Over current faults
Under current (DC Disconnect) fault
Thermal shutdown (TSD) fault
Watchdog timer faults (disabled via WD_DIS pin)
Any one of the first four fault conditions listed above causes the port to shut down, and a 3-bit fault code to be
latched into the affected port's Status Read 1 register (addr = 0100b). Watchdog faults cause all four ports to
shut down. Faulted ports are temporarily disabled after a fault has been detected and latched.
The INTB pin is an open-drain, active-low output which is asserted if a fault condition occurs on any of the four
ports. This indication is asserted for any of the port faults which result in a code displayed in the port status
register (the faults listed in Table 8). In automode, the fault latch, the status register fault bits, and consequently,
INTB assertion, are cleared by expiration of the 750-ms TED timer.
16
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