參數(shù)資料
型號: TPS2359RHHT
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 2-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC36
封裝: 6 X 6 MM, GREEN, PLASTIC, QFN-36
文件頁數(shù): 8/53頁
文件大?。?/td> 1074K
代理商: TPS2359RHHT
SLUS792F – FEBRUARY 2008 – REVISED AUGUST 2010
www.ti.com
REFERENCE INFORMATION
The TPS2359 has been designed to simplify compliance with the PICMG-AMC.R2.0 and PICMG-MTCA.0
specifications. These specifications were developed by the PCI Industrial Computer Manufacturers Group
(PICMG). These two specifications are derivations of the PICMG-ATCA (Advanced Telecommunication
Computing Architecture) specification originally released in December, 2002.
PICMG-AMC Highlights
AMC - Advanced Mezzanine Cards
Designed to Plug into ATCA Carrier Boards
AdvancedMC Focuses on Low Cost
1 to 8 AdvancedMC per ATCA Carrier Board
3.3-V Management Power – Maximum Current Draw of 150 mA
12-V Payload Power – Converted to Required Voltages on AMC
Maximum 80-W Dissipation per AdvancedMC
Hotswap and Current Limiting Must Be Present on Carrier Board
For Details, see www.picmg.org/v2internal/AdvancedMC.htm
PICMG-MTCA Highlights
MTCA – MicroTelecommunications Computing Architecture
Architecture for Using AMCs Without an ATCA Carrier Board
Up to 12 AMCs per System, Plus Two MCHs, Plus Two CUs
Focuses on Low Cost
All functions of ATCA Carrier Board Must Be Provided
MicroTCA is also known as MTCA, mTCA, or uTCA For Details, see www.picmg.org/v2internal/microTCA.htm
Control and Status Registers
Ten 8 bit registers are used to control and read the status of the TPS2359. Registers 0 and 1 control the 12A
channel and register 2 controls the 3A channel. Similarly, registers 3 and 4 control the 12B channel and register
5 controls the 3B channel. Register 6 contains eight general configuration bits. Read-only registers 7, 8, and 9
report back system status to the I2C controller. All ten registers use the I2C protocol and are organized as
follows:
Table 1. Top Level Register Functions
REG
R/W
SLOT
VOLTAGE
FUNCTION
0
R/W
A
12
Set current limit, power good threshold, and OR functions of 12A.
1
R/W
A
12
Set fault time, enable, and bleed down functions of 12A.
2
R/W
A
3.3
Set fault time, enable, and bleed down functions of 3A.
3
R/W
B
12
Set current limit, power good threshold, and OR functions of 12B.
4
R/W
B
12
Set fault time, enable, and bleed down functions of 12B.
5
R/W
B
3.3
Set fault time, enable, and bleed down functions of 3B.
6
R/W
A, B
3.3, 12
System configuration controls.
7
R
A, B
3.3, 12
Fault and PG outputs for 3A, 12A, 3B, 12B – these bits set IRPT.
8
R
A, B
12
Over current and fast trip latches for 3A, 12A, 3B, 12B.
9
R
A, B
3.3, 12
Channel status indicators for 3A, 12A, 3B, 12B.
16
Copyright 2008–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS2359
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