參數(shù)資料
型號(hào)： TPS2216ADBRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： 3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO30
封裝： GREEN, PLASTIC, MO-150, SSOP-30
文件頁(yè)數(shù)： 28/30頁(yè)
文件大?。?/td> 554K
代理商： TPS2216ADBRG4
TPS2214A, TPS2216A
DUALSLOT PC CARD POWER SWITCHES
FOR SERIAL PCMCIA CONTROLLERS
SLVS267C DECEMBER 1999 REVISED FEBRUARU 2008
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics
PARAMETER
LOAD CONDITION
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CL(xVCC) = 0.1 F,
CL(xVPP) = 0.1 F,
§
VO(xVCC)
1
tr
Output rise times
CL(xVPP) = 0.1 F,
IO(xVCC) = 0§,
IO(xVPP) = 0§
VO(xVPP)
0.8
ms
tr
Output rise times
CL(xVCC) = 150 F,
CL(xVPP) = 10 F,
VO(xVCC)
1.2
ms
CL(xVPP) = 10 F,
IO(xVCC) = 1 A,
IO(xVPP) = 50 mA
VO(xVPP)
2.5
CL(xVCC) = 0.1 F,
CL(xVPP) = 0.1 F,
§
VO(xVCC)
0.01
tf
Output fall times
CL(xVPP) = 0.1 F,
IO(xVCC) = 0§,
IO(xVPP) = 0§
VO(xVPP)
0.01
ms
tf
Output fall times
CL(xVCC) = 150 F,
CL(xVPP) = 10 F,
VO(xVCC)
3
ms
CL(xVPP) = 10 F,
IO(xVCC) = 1 A,
IO(xVPP) = 50 mA
VO(xVPP)
8
Latch
↑ to xVPP (12 V)
tpd(on)
3
Latch
↑ to xVPP (12 V)
tpd(off)
25
Latch
↑ to xVPP (5 V)
tpd(on)
0.6
Latch
↑ to xVPP (5 V)
tpd(off)
8.5
Latch
↑ to xVPP (3.3 V), VI(5V) = 5 V
tpd(on)
0.6
CL(xVCC) = 0.1 F,
Latch
↑ to xVPP (3.3 V), VI(5V) = 5 V
tpd(off)
9
CL(xVCC) = 0.1 F,
CL(xVPP) = 0.1 F,
§
Latch
↑ to xVPP (3.3 V), VI(5V) = 0 V
tpd(on)
1.4
CL(xVPP) = 0.1 F,
IO(xVCC) = 0§,
IO(xVPP) = 0§
Latch
↑ to xVPP (3.3 V), VI(5V) = 0 V
tpd(off)
9
IO(xVCC) = 0 ,
IO(xVPP) = 0§
Latch
↑ to xVCC (5 V)
tpd(on)
0.3
Latch
↑ to xVCC (5 V)
tpd(off)
15
Latch
↑ to xVCC (3.3 V), VI(5V) = 5 V
tpd(on)
0.2
Latch
↑ to xVCC (3.3 V), VI(5V) = 5 V
tpd(off)
15
Latch
↑ to xVCC (3.3 V), VI(5V) = 0 V
tpd(on)
0.4
tpd
Propagation delay
Latch
↑ to xVCC (3.3 V), VI(5V) = 0 V
tpd(off)
15
ms
tpd
Propagation delay
Latch
↑ to xVPP (12 V)
tpd(on)
4.5
ms
Latch
↑ to xVPP (12 V)
tpd(off)
13
Latch
↑ to xVPP (5 V)
tpd(on)
3.3
Latch
↑ to xVPP (5 V)
tpd(off)
8
Latch
↑ to xVPP (3.3 V), VI(5V) = 5 V
tpd(on)
3
CL(xVCC) = 150 F,
Latch
↑ to xVPP (3.3 V), VI(5V) = 5 V
tpd(off)
9
CL(xVCC) = 150 F,
CL(xVPP) = 10 F,
Latch
↑ to xVPP (3.3 V), VI(5V) = 0 V
tpd(on)
3
CL(xVPP) = 10 F,
IO(xVCC) = 1 A,
IO(xVPP) = 50 mA
Latch
↑ to xVPP (3.3 V), VI(5V) = 0 V
tpd(off)
9
IO(xVCC) = 1 A,
IO(xVPP) = 50 mA
Latch
↑ to xVCC (5 V)
tpd(on)
1
Latch
↑ to xVCC (5 V)
tpd(off)
12
Latch
↑ to xVCC (3.3 V), VI(5V) = 5 V
tpd(on)
0.6
Latch
↑ to xVCC (3.3 V), VI(5V) = 5 V
tpd(off)
12
Latch
↑ to xVCC (3.3 V), VI(5V) = 0 V
tpd(on)
1
Latch
↑ to xVCC (3.3 V), VI(5V) = 0 V
tpd(off)
12
Refer to Parameter Measurement Information
Specified by design: not tested in production.
§ No card inserted, assumes 0.1-F recommended output capacitor (see Figure 32).
相關(guān)PDF資料
PDF描述
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