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參數資料
| 型號： | TPA3100D2RGZTG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 21.8 W, 2 CHANNEL, AUDIO AMPLIFIER, PQCC48 |
| 封裝： | 7 X 7 MM, GREEN, PLASTIC, VQFN-48 |
| 文件頁數： | 16/41頁 |
| 文件大?。?/td> | 1191K |
| 代理商： | TPA3100D2RGZTG4 |
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OUTP
OUTN
1nF
20 W
www.ti.com
SLOS469F – OCTOBER 2005 – REVISED AUGUST 2010
IC Output Snubbers
1-nF capacitors in series with 20-
Ω resistors from the outputs of the TPA3100D2 IC to ground are switching
snubbers. These are illustrated in Figure 33. They linearize switching transitions and reduce overshoot and
ringing. By doing so they improve THD+N, reducing it by a factor near 3 at 1kHz, 1W; and they improve EMC by
2 to 6 dB at middle frequencies. They increase quiescent current by 5 to 15 mA depending on power supply
voltage.
Figure 33. IC Output Snubbers
BSN and BSP Capacitors
The full H-bridge output stages use only NMOS transistors. Therefore, they require bootstrap capacitors for the
high side of each output to turn on correctly. A 220-nF ceramic capacitor, rated for at least 25 V, must be
connected from each output to its corresponding bootstrap input. Specifically, one 220-nF capacitor must be
connected from xOUTP to BSxx, and one 220-nF capacitor must be connected from xOUTN to BSxx. (See the
application circuit diagram in Figure 21.)
The bootstrap capacitors connected between the BSxx pins and corresponding output function as a floating
power supply for the high-side N-channel power MOSFET gate drive circuitry. During each high-side switching
cycle, the bootstrap capacitors hold the gate-to-source voltage high enough to keep the high-side MOSFETs
turned on.
VCLAMP Capacitors
To ensure that the maximum gate-to-source voltage for the NMOS output transistors is not exceeded, two
internal regulators clamp the gate voltage. Two 1-mF capacitors must be connected from VCLAMPL (pin 30) and
VCLAMPR (pin 31) to ground and must be rated for at least 16 V. The voltages at the VCLAMP terminals may
vary with VCC and may not be used for powering any other circuitry.
Internal Regulated 4-V Supply (VREG)
The VREG terminal (pin 15) is the output of an internally generated 4-V supply, used for the oscillator,
preamplifier, and gain control circuitry. It requires a 10-nF capacitor, placed close to the pin, to keep the regulator
stable.
This regulated voltage can be used to control GAIN0, GAIN1, MSTR/SLV, and MUTE terminals, but should not
be used to drive external circuitry.
VBYP Capacitor Selection
The internal bias generator (VBYP) nominally provides a 1.25-V internal bias for the preamplifier stages. The
external input capacitors and this internal reference allow the inputs to be biased within the optimal
common-mode range of the input preamplifiers.
The selection of the capacitor value on the VBYP terminal is critical for achieving the best device performance.
During power up or recovery from the shutdown state, the VBYP capacitor determines the rate at which the
amplifier starts up. When the voltage on the VBYP capacitor equals VBYP, the device starts a 16.4-ms timer.
When this timer completes, the outputs start switching. The charge rate of the capacitor is calculated using the
standard charging formula for a capacitor, I = C x dV/dT. The charge current is nominally equal to 250A and dV
is equal to VBYP. For example, a 1-F capacitor on VBYP would take 5 ms to reach the value of VBYP and
begin a 16.4-ms count before the outputs turn on. This equates to a turn-on time of <30 ms for a 1-F capacitor
on the VBYP terminal.
Copyright 2005–2010, Texas Instruments Incorporated
23
Product Folder Link(s): TPA3100D2
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