參數(shù)資料
型號： TP2640ND
廠商： SUPERTEX INC
元件分類： 功率晶體管
英文描述： P-Channel Enhancement-Mode Vertical DMOS FETs
中文描述： 400 V, P-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝： DIE
文件頁數(shù)： 2/4頁
文件大?。?/td> 457K
代理商： TP2640ND
2
TP2635/TP2640
Package
I
D
(continuous)*
I
D
(pulsed)
Power Dissipation
@ T
C
= 25
°
C
1.3W
θ
jc
°
C/W
θ
ja
°
C/W
96
I
DR
*
I
DRM
SO-8
-210mA
-1.25A
24
-210mA
-1.25A
TO-92
-180mA
-0.8A
1.0W
125
170
-180mA
-0.8A
*
I
(continuous) is limited by max rated T
.
Mounted on FR4 board, 25mm x 25mm x 1.57mm.
Thermal Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
BV
DSS
TP2640
-400
V
V
GS
= 0V, I
D
= -2.0mA
TP2635
-350
V
GS(th)
V
GS(th)
I
GSS
I
DSS
Gate Threshold Voltage
-0.8
-2.0
V
V
GS
= V
DS
, I
D
= -1.0mA
V
GS
= V
DS
, I
D
= -1.0mA
V
GS
=
±
20V, V
DS
= 0V
V
GS
= 0V, V
DS
= -100V
V
GS
= 0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125
°
C
V
GS
= -10V, V
DS
= -25V
V
GS
= -2.5V, I
D
= -20mA
V
GS
= -4.5V, I
D
= -150mA
V
GS
= -10V, I
D
= -300mA
V
GS
= -10V, I
D
= -300mA
V
DS
= -25V, I
D
= -300mA
Change in V
GS(th)
with Temperature
Gate Body Leakage
5.0
mV/
°
C
-100
nA
Zero Gate Voltage Drain Current
-1
μ
A
-10
μ
A
-1
mA
I
D(ON)
R
DS(ON)
ON-State Drain Current
0.7
12
15
11
15
11
15
R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Change in R
DS(ON)
with Temperature
Forward Transconductance
0.75
%/
°
C
200
m
Input Capacitance
300
Common Source Output Capacitance
50
pF
Reverse Transfer Capacitance
12
Turn-ON Delay Time
10
Rise Time
15
Turn-OFF Delay Time
60
Fall Time
40
Diode Forward Voltage Drop
-1.8
V
V
GS
= 0V, I
SD
= -200mA
V
GS
= 0V, I
SD
= -200mA
Reverse Recovery Time
300
ns
Notes:
1. All D.C. parameters 100% tested at 25
°
C unless otherwise stated. (Pulse test: 300
μ
s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
A
Electrical Characteristics
(@ 25
°
C unless otherwise specified)
Drain-to-Source
Breakdown Voltage
V
GS
= 0V, V
DS
= -25V
f = 1 MHz
V
DD
= -25V,
I
D
= -300mA,
R
GEN
= 25
ns
Static Drain-to-Source
ON-State Resistance
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
0V
V
DD
R
gen
0V
-10V
Switching Waveforms and Test Circuit
相關(guān)PDF資料
PDF描述
TP5322_07 P-Channel Enhancement-Mode Vertical DMOS FETs
TP5322 P-Channel Enhancement-Mode Vertical DMOS FET
TP5322K1 P-Channel Enhancement-Mode Vertical DMOS FET
TP5322K1-G P-Channel Enhancement-Mode Vertical DMOS FET
TP5322N8 P-Channel Enhancement-Mode Vertical DMOS FET
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