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參數(shù)資料
| 型號： | TNT4882-BQ |
| 英文描述： | Peripheral Miscellaneous |
| 中文描述： | 周邊雜項 |
| 文件頁數(shù)： | 8/16頁 |
| 文件大?。?/td> | 165K |
| 代理商： | TNT4882-BQ |
TNT4882
Single-Chip IEEE 488.2 Talker/Listener ASIC
National Instruments
Phone: (512) 794-0100 Fax: (512) 683-9300 info@natinst.com www.natinst.com
8
SENSE_8_16N
0
0
0
0
0
0
1
1
1
1
BHEN_N
0
0
0
0
1
1
1
1
1
1
ADDR4-0
11000
11000
XXXX1
XXXX1
XXXX0
XXXX0
XXXX0
XXXX0
XXXX1
XXXX1
IORN
0
1
0
1
0
1
0
1
0
1
IOWN
1
0
1
0
1
0
1
0
1
0
DATA15-8
FIFOA
FIFOA
Read
Written
Not Driven
Ignored
Not Driven
Ignored
Not Driven
Ignored
DATA7-0
FIFOB
FIFOB
Not Driven
Ignored
Read
Written
Read
Written
Read
Written
ISA Pin Configuration Byte Lane Table
This table shows which byte lane accesses the TNT4882 internal
registers during an I/O access when you use the ISA pin
configuration. All combinations of ADDR4-1, SENSE_8_16N,
and BHEN_N not shown in this table are illegal. You should not
apply these combinations to the TNT4882 while the chip is
selected. The accessed register is determined only by ADDR4-0,
not SENSE_8_16N or BHEN_N.
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