參數(shù)資料
型號: TMX320F28069PNA
廠商: Texas Instruments
文件頁數(shù): 63/174頁
文件大小: 0K
描述: IC MCU 32BIT 128KB FLASH 80LQFP
產(chǎn)品培訓(xùn)模塊: ControlSUITE
Piccolo F2806x
TPS75005 Single IC Power for C2000 MCU
標準包裝: 1
系列: TMS320F2806x, Piccolo™, C2000™
核心處理器: C28x
芯體尺寸: 32-位
速度: 80MHz
連通性: CAN,I²C,McBSP,SCI,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 256KB(128K x 16)
程序存儲器類型: 閃存
RAM 容量: 50K x 16
電壓 - 電源 (Vcc/Vdd): 1.71 V ~ 1.995 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-LQFP
包裝: 托盤
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
5.25 Flash Timing
Table 5-78. Flash/OTP Endurance for T Temperature Material(1)
ERASE/PROGRAM
MIN
TYP
MAX
UNIT
TEMPERATURE
Nf
Flash endurance for the array (write/erase cycles)
0°C to 105°C (ambient)
20000
50000
cycles
NOTP
OTP endurance for the array (write cycles)
0°C to 30°C (ambient)
1
write
(1)
Write/erase operations outside of the temperature ranges indicated are not specified and may affect the endurance numbers.
Table 5-79. Flash/OTP Endurance for S Temperature Material(1)
ERASE/PROGRAM
MIN
TYP
MAX
UNIT
TEMPERATURE
Nf
Flash endurance for the array (write/erase cycles)
0°C to 125°C (ambient)
20000
50000
cycles
NOTP
OTP endurance for the array (write cycles)
0°C to 30°C (ambient)
1
write
(1)
Write/erase operations outside of the temperature ranges indicated are not specified and may affect the endurance numbers.
Table 5-80. Flash/OTP Endurance for Q Temperature Material(1)(2)
ERASE/PROGRAM
MIN
TYP
MAX
UNIT
TEMPERATURE
Nf
Flash endurance for the array (write/erase cycles)
–40°C to 125°C (ambient)
20000
50000
cycles
NOTP
OTP endurance for the array (write cycles)
–40°C to 30°C (ambient)
1
write
(1)
Write/erase operations outside of the temperature ranges indicated are not specified and may affect the endurance numbers.
(2)
The "Q" temperature option is not available on the 2806xU devices.
Table 5-81. Flash Parameters at 90-MHz SYSCLKOUT
TEST
PARAMETER
MIN
TYP
MAX
UNIT
CONDITIONS
Program Time
16-Bit Word
50
μs
16K Sector
500
ms
8K Sector
250
ms
4K Sector
125
ms
Erase Time(1)
16K Sector
2
s
8K Sector
2
s
4K Sector
2
s
IDDP
(2)
VDD current consumption during Erase/Program cycle
VREG disabled
80
mA
IDDIOP
(2)
VDDIO current consumption during Erase/Program cycle
60
IDDIOP
(2)
VDDIO current consumption during Erase/Program cycle
VREG enabled
120
mA
(1)
The on-chip flash memory is in an erased state when the device is shipped from TI. As such, erasing the flash memory is not required
prior to programming, when programming the device for the first time. However, the erase operation is needed on all subsequent
programming operations.
(2)
Typical parameters as seen at room temperature including function call overhead, with all peripherals off.
Table 5-82. Flash/OTP Access Timing(1)
PARAMETER
MIN
MAX
UNIT
ta(fp)
Paged Flash access time
36
ns
ta(fr)
Random Flash access time
36
ns
ta(OTP)
OTP access time
60
ns
(1)
Access time numbers shown in this table are prior to device characterization. Final numbers will be published in the TMS datasheet.
Copyright 2010–2012, Texas Instruments Incorporated
Peripheral and Electrical Specifications
155
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