參數(shù)資料
型號(hào)： TMS44400P
廠商： Texas Instruments, Inc.
英文描述： 1048576-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORIES
中文描述： 1048576字4位動(dòng)態(tài)隨機(jī)存取記憶體
文件頁(yè)數(shù)： 1/25頁(yè)
文件大?。?/td> 657K
代理商： TMS44400P
TMS44400, TMS44400P, TMS46400, TMS46400P
1048576-WORD BY 4-BIT
DYNAMIC RANDOM-ACCESS MEMORIES
SMHS562C – MAY 1995 – REVISED NOVEMBER 1996
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Organization . . . 1048576
×
4
Single 5-V Power Supply for TMS44400/P
(
±
10% Tolerance)
Single 3.3-V Power Supply for TMS46400/P
(
±
10% Tolerance)
Low Power Dissipation (TMS46400P only)
200-
μ
A CMOS Standby
200-
μ
A Self Refresh
300-
μ
A Extended-Refresh Battery
Backup
Performance Ranges:
ACCESS ACCESS ACCESS
TIME
TIME
(tRAC)
(tCAC)
(MAX)
(MAX)
’4x400/P-60
60 ns
15 ns
’4x400/P-70
70 ns
18 ns
’4x400/P-80
80 ns
20 ns
Enhanced Page-Mode Operation for Faster
Memory Access
CAS-Before-RAS (CBR) Refresh
Long Refresh Period
1024-Cycle Refresh in 16 ms
128 ms (MAX) for Low-Power,
Self-Refresh Version (TMS4x400P)
3-State Unlatched Output
Texas Instruments EPIC
CMOS Process
READ
OR WRITE
CYCLE
(MIN)
110 ns
130 ns
150 ns
TIME
(tAA)
(MAX)
30 ns
35 ns
40 ns
Operating Free-Air Temperature Range
0
°
C to 70
°
C
AVAILABLE OPTIONS
DEVICE
POWER
SUPPLY
SELF-REFRESH
BATTERY
BACKUP
REFRESH
CYCLES
TMS44400
5 V
—
1024 in 16 ms
TMS44400P
5 V
Yes
1024 in 128 ms
TMS46400
3.3 V
—
1024 in 16 ms
TMS46400P
3.3 V
Yes
1024 in 128 ms
These devices feature maximum RAS access times of 60 ns, 70 ns, and 80 ns. All addresses and data-in lines
are latched on chip to simplify system design. Data out is unlatched to allow greater system flexibility.
The TMS4x400 and TMS4x400P are offered in a 20/26-lead plastic small-outline (TSOP) package (DGA suffix)
and a 300-mil 20/26-lead plastic surface-mount SOJ package (DJ suffix). Both packages are characterized for
operation from 0
°
C to 70
°
C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ADVANCE INFORMATION concerns new products in the sampling or
specifications are subject to change without notice.
PIN NOMENCLATURE
A0–A9
CAS
DQ1–DQ4
OE
RAS
VCC
VSS
W
Address Inputs
Column-Address Strobe
Data In
Output Enable
Row-Address Strobe
5-V or 3.3-V Supply
Ground
Write Enable
DJ PACKAGE
(TOP VIEW)
V
SS
DQ4
DQ3
CAS
OE
A8
A7
A6
A5
A4
26
25
24
23
22
18
17
16
15
14
1
2
3
4
5
9
10
11
12
13
DGA PACKAGE
(TOP VIEW)
DQ1
DQ2
W
RAS
A9
A0
A1
A2
A3
V
CC
V
SS
DQ4
DQ3
CAS
OE
A8
A7
A6
A5
A4
26
25
24
23
22
18
17
16
15
14
1
2
3
4
5
9
10
11
12
13
DQ1
DQ2
W
RAS
A9
A0
A1
A2
A3
V
CC
EPIC is a trademark of Texas Instruments Incorporated.
A
description
The TMS4x400 series is a set of high-speed,
4194304-bit dynamic random-access memories
(DRAMs), organized as 1048576 words of four
bits each. The TMS4x400P series is a set of
high-speed,
low-power,
extended-refresh,
4194304-bit
organized as 1048576 words of four bits each.
Both series employ state-of-the-art enhanced
performance
implanted
technology for high performance, reliability, and
low power.
self-refresh
with
DRAMs,
CMOS
(EPIC
)
Copyright
1996, Texas Instruments Incorporated
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