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參數(shù)資料
| 型號： | TMS416100-80DJ |
| 英文描述： | x1 Fast Page Mode DRAM |
| 中文描述： | x1快速頁面模式的DRAM |
| 文件頁數(shù)： | 9/25頁 |
| 文件大?。?/td> | 437K |
| 代理商： | TMS416100-80DJ |
TMS416100, TMS416100P
16777216-BIT
DYNAMIC RANDOM-ACCESS MEMORIES
SMKS611 – FEBRUARY 1994
9
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
timing requirements over recommended ranges of supply voltage and operating free-air
temperature
’416100-60
’416100P-60
’416100-70
’416100P-70
’416100-80
’416100P-80
UNIT
MIN
110
MAX
MIN
130
MAX
MIN
150
MAX
tRC
tRWC
tPC
tPRWC
tRASP
tRAS
tCAS
tCP
tRP
tWP
tASC
tASR
tDS
tRCS
tCWL
tRWL
tWCS
Cycle time, random read or write (see Note 8)
ns
Cycle time, read-write (see Note 8)
130
153
175
ns
Cycle time, page-mode read or write (see Notes 8 and 9)
40
45
50
ns
Cycle time, page-mode read-write (see Note 8)
60
68
75
ns
Pulse duration, page-mode, RAS low (see Note 10)
60
100 000
70
100 000
80
100 000
ns
Pulse duration, nonpage-mode, RAS low (see Note 10)
60
10 000
70
10 000
80
10 000
ns
Pulse duration, CAS low (see Note 11)
15
10 000
18
10 000
20
10 000
ns
Pulse duration, CAS high
10
10
10
ns
Pulse duration, RAS high (precharge)
40
50
60
ns
Pulse duration, W low
10
10
10
ns
Setup time, column address before CAS low
0
0
0
ns
Setup time, row address before RAS low
0
0
0
ns
Setup time, data (see Note 12)
0
0
0
ns
Setup time, W high before CAS low
0
0
0
ns
Setup time, W low before CAS high
15
18
20
ns
Setup time, W low before RAS high
15
18
20
ns
Setup time, W low before CAS low (early-write operation only)
0
0
0
ns
tWRP
Setup time, W high before RAS low
(CAS-before-RAS refresh only)
10
10
10
ns
tWTS
tCAH
tDH
tRAH
tRCH
tRRH
tWCH
Setup time, W low before RAS low (test mode only)
10
10
10
ns
Hold time, column address after CAS low
10
15
15
ns
Hold time, data (see Note 12)
10
15
15
ns
Hold time, row address after RAS low
10
10
10
ns
Hold time, W high after CAS high (see Note 13)
0
0
0
ns
Hold time, W high after RAS high (see Note 13)
0
0
0
ns
Hold time, W low after CAS low (early-write operation only)
10
15
15
ns
tWRH
Hold time, W high after RAS low
(CAS-before-RAS refresh only)
10
10
10
ns
tWTH
tRHCP
tCHS
NOTES:
Hold time, W low after RAS low (test mode only)
10
10
10
ns
Hold time, RAS high from CAS precharge
35
40
45
ns
Hold time, CAS low after RAS high (self refresh)
– 50
– 50
– 50
ns
8. All cycle times assume tT = 5 ns.
9. To assure tPC min, tASC should be greater than or equal to tCP.
10. In a read-write cycle, tRWD and tRWL must be observed.
11. In a read-write cycle, tCWD and tCWL must be observed.
12. Referenced to the later of CAS or W in write operations
13. Either tRRH or tRCH must be satisfied for a read cycle.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS416100-80DZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x1 Fast Page Mode DRAM |
| TMS4161-15FML | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fast Page Mode VRAM |
| TMS4161-15NL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMS4161-20FML | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fast Page Mode VRAM |
| TMS4161-20NL | 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:64K X 1 VIDEO DRAM, 200 ns, PDIP20 |
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