參數(shù)資料
型號(hào)： TMS37F136
廠商： Texas Instruments, Inc.
英文描述： Controller Entry Transponder IC
中文描述： 控制器項(xiàng)應(yīng)答器集成電路
文件頁(yè)數(shù)： 20/48頁(yè)
文件大?。?/td> 711K
代理商： TMS37F136
TMS370Cx36
8-BIT MICROCONTROLLER
SPNS039B – JANUARY 1996 – REVISED FEBRUARY 1997
20
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
serial peripheral interface (continued)
The SPI block diagram is illustrated in Figure 6.
SPIBUF Buffer
Register
SPIDAT
Data Register
SPIBUF.7-0
State Control
SPI CHAR
SPI BIT RATE
CLOCK POLARITY
SPI INT FLAG
SPICTL.6
SPIINT ENA
SPICTL.0
RECEIVER
OVER RUN
SPICTL.7
8
SPIDAT.7-0
SPICTL.1
TALK
2
0
1
3
4
5
SPICCR.2-0
SPICCR.5-3
System
Clock
SPICCR.6
SPICLK
MASTER/SLAVE
Level 2 INT
SPIPRI.6
1
SPIPC2.7-4
SPISIMO
SPICTL.2
SPIPC1.3-0
SPISOMI
SPIPC2.3-0
Level 1 INT
0
The block diagram is shown in slave mode.
Figure 6. SPI Block Diagram
programmable acquisition and control timer (PACT) module
Traditionally, timers in microcontrollers provide limited capture and compare functions consuming significant
CPU processing power and leading to inaccurate timings due to interrupt latencies. The programmable
acquisition and control timer (PACT) acts as a coprocessor combining configurable capture and compare
features, within a flexible dual-port RAM, able to run real-time tasks with little or no CPU intervention. The PACT
structure allows concatenation of tasks, thus enabling the CPU to perform data manipulation while the PACT
module both captures and outputs real-time-related information. Since all the PACT control information is held
within the dual-port Ram, the CPU can access these parameters quickly.
To use the PACT, the user must set up three distinct areas of memory. The first is the dual-port RAM, which
contains the capture area, the commands, and the timer definitions. The second is the peripheral frame. The
third is an area near the end of the program memory which holds the interrupt vectors of PACT.
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