參數(shù)資料
型號： TMS320LF2407PG
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： DSP CONTROLLERS
中文描述： DSP控制器
文件頁數(shù)： 92/123頁
文件大?。?/td> 1205K
代理商： TMS320LF2407PG
www.ti.com
t
h(boot-mode)(A)
t
w(RSL2)
XCLKIN
X1/X2
XRS
Boot-Mode
Pins
XCLKOUT
I/O Pins
Address/Data/
Control
(Internal)
Boot-ROM Execution Starts
User-Code Execution Starts
User-Code Dependent
User-Code Execution Phase
(Don’t Care)
User-Code Dependent
User-Code Execution
Peripheral/GPIO Function
User-Code Dependent
GPIO Pins as Input (State Depends on Internal PU/PD)
GPIO Pins as Input
Peripheral/GPIO Function
t
d(EX)
OSCCLK * 5
OSCCLK/8
TMS320F2808, TMS320F2806
TMS320F2801, UCD9501
Digital Signal Processors
SPRS230F–OCTOBER 2003–REVISED SEPTEMBER 2005
Table 6-11. Reset (XRS) Timing Requirements
MIN
NOM
MAX
UNIT
cycles
cycles
t
w(RSL1)(1)
t
w(RSL2)
Pulse duration, stable XCLKIN to XRS high
Pulse duration, XRS low
Pulse duration, reset pulse generated by
watchdog
Delay time, address/data valid after XRS high
Oscillator start-up time
Hold time for boot-mode pins
8t
c(OSCCLK)
8t
c(OSCCLK)
Warm reset
t
w(WDRS)
512t
c(OSCCLK)
cycles
t
d(EX)
t
OSCST(2)
t
h(boot-mode)
(1)
In addition to the t
requirement, XRS has to be low at least for 1 ms after V
DD
reaches 1.5 V.
(2)
Dependent on crystal/resonator and board design.
32t
c(OSCCLK)
cycles
ms
cycles
1
10
200t
c(OSCCLK)
A.
After reset, the Boot ROM code samples BOOT Mode pins. Based on the status of the Boot Mode pin, the boot code
branches to destination memory or boot code function. If Boot ROM code executes after power-on conditions (in
debugger environment), the Boot code execution time is based on the current SYSCLKOUT speed. The
SYSCLKOUT will be based on user environment and could be with or without PLL enabled.
Figure 6-6. Warm Reset
Figure 6-7
shows an example for the effect of writing into PLLCR register. In the first phase, PLLCR =
0x0004 and SYSCLKOUT = OSCCLK x 2. The PLLCR is then written with 0x0008. Right after the PLLCR
register is written, the PLL lock-up phase begins. During this phase, SYSCLKOUT = OSCCLK/2. After the
PLL lock-up is complete (which takes 131072 OSCCLK cycles), SYSCLKOUT reflects the new operating
frequency, OSCCLK x 4.
92
Electrical Specifications
相關(guān)PDF資料
PDF描述
TMS320LF2407PGE 1A, 52kHz (250khz Max) Current Mode PWM Control Circuit with 8.4V UVLO Threshold and 96% Max Duty Cycle<sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup> ; Package: 8 LEAD PDIP; No of Pins: 8; Container: Rail; Qty per Container: 50
TMS320LC2404 1A, 52kHz (250khz Max) Current Mode PWM Control Circuit with 16V UVLO Threshold and 96% Max Duty Cycle<sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup> ; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98
TMS320LC2406PG DSP CONTROLLERS
TMS320LC2406PGE 1A, 52kHz (250khz Max) Current Mode PWM Control Circuit with 16V UVLO Threshold and 96% Max Duty Cycle<sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup><sup>3</sup> ; Package: 8 LEAD PDIP; No of Pins: 8; Container: Rail; Qty per Container: 50
TMS320LC2406PZ DSP CONTROLLERS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320LF2407PGES 制造商:Rochester Electronics LLC 功能描述:- Bulk
TMS320M640AGNZ4 制造商:Texas Instruments 功能描述:TMS320DM640 548PIN FCBGA PG2.0 - Trays
TMS320M641AGDK5 制造商:Texas Instruments 功能描述:TMS320DM641AGDK PG2 548 PIN FCBGA 500MHZ - Trays
TMS320M641AGDK6 制造商:Texas Instruments 功能描述:TMS320DM641AGDK PG2 548 PIN FCBGA - Trays
TMS320M641AGNZ5 制造商:Texas Instruments 功能描述:TMS320DM641A 548PIN FCBGA PG2.0 500MHZ - Trays
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*