參數(shù)資料
型號(hào): TMS320F240PQL
英文描述: 16-Bit Microcontroller
中文描述: 16位微控制器
文件頁(yè)數(shù): 32/105頁(yè)
文件大小: 1481K
代理商: TMS320F240PQL
TMS320C240, TMS320F240
DSP CONTROLLERS
SPRS042D – OCTOBER 1996 – REVISED NOVEMBER 1998
32
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Table 10. Legend for the ’F240 Internal Hardware Functional Block Diagram (Continued)
SYMBOL
NAME
DESCRIPTION
PREG
Product Register
32-bit register holds results of 16
×
16 multiply.
0-, 1- or 4-bit left shift, or 6-bit right shift of multiplier product. The left-shift options are used to manage the
additional sign bits resulting from the 2s-complement multiply. The right-shift option is used to scale down
the number to manage overflow of product accumulation in the CALU. PSCALE resides in the path from the
32-bit product shifter and from either the CALU or the Data-Write Data Bus (DWEB), and requires no cycle
overhead.
PSCALE
Product-Scaling
Shifter
STACK
Stack
STACK is a block of memory used for storing return addresses for subroutines and interrupt-service
routines, or for storing data. The ’C20x stack is 16-bit wide and eight-level deep.
TREG
Temporary
Register
16-bit register holds one of the operands for the multiply operations. TREG holds the dynamic shift count
for the LACT, ADDT, and SUBT instructions. TREG holds the dynamic bit position for the BITT instruction.
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