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    參數(shù)資料
    型號: TMS320C67XPERIPHERALS
    元件分類: 數(shù)字信號處理
    英文描述: 32-Bit Digital Signal Processor
    中文描述: 32位數(shù)字信號處理器
    文件頁數(shù): 22/132頁
    文件大?。?/td> 1707K
    代理商: TMS320C67XPERIPHERALS
    SPRS145G
    JULY 2000
    REVISED FEBRUARY 2002
    22
    POST OFFICE BOX 1443
    HOUSTON, TEXAS 77251
    1443
    pin functions (continued)
    Table 2. LF240xA and LC240xA Pin List and Package Options
    (Continued)
    PIN NAME
    LF2407A
    (144-PGE)
    2406A
    (100-PZ)
    LC2404A
    (100-PZ)
    2403A,
    LC2402A
    (64-PAG)
    and
    2402A
    (64-PG)
    DESCRIPTION
    ADDRESS, DATA, AND MEMORY CONTROL SIGNALS (CONTINUED)
    ENA_144
    122
    Active high to enable external interface signals. If pulled low, the
    2407A behaves like the 2406A/2403A/2402A
    i.e., it has no
    external memory and generates an illegal address if DS is
    asserted. This pin has an internal pulldown.
    (
    )
    VIS_OE
    97
    Visibility output enable (active when data bus is output). This pin
    is active (low) whenever the external data bus is driving as an
    output during visibility mode. Can be used by external decode
    logic to prevent data bus contention while running in visibility
    mode.
    A0
    80
    Bit 0 of the 16-bit address bus
    A1
    78
    Bit 1 of the 16-bit address bus
    A2
    74
    Bit 2 of the 16-bit address bus
    A3
    71
    Bit 3 of the 16-bit address bus
    A4
    68
    Bit 4 of the 16-bit address bus
    A5
    64
    Bit 5 of the 16-bit address bus
    A6
    61
    Bit 6 of the 16-bit address bus
    A7
    57
    Bit 7 of the 16-bit address bus
    A8
    53
    Bit 8 of the 16-bit address bus
    A9
    51
    Bit 9 of the 16-bit address bus
    A10
    48
    Bit 10 of the 16-bit address bus
    A11
    45
    Bit 11 of the 16-bit address bus
    A12
    43
    Bit 12 of the 16-bit address bus
    A13
    39
    Bit 13 of the 16-bit address bus
    A14
    34
    Bit 14 of the 16-bit address bus
    A15
    31
    Bit 15 of the 16-bit address bus
    D0
    127
    Bit 0 of 16-bit data bus
    (
    )
    (
    )
    (
    )
    (
    )
    (
    )
    (
    )
    D1
    130
    Bit 1 of 16-bit data bus
    D2
    132
    Bit 2 of 16-bit data bus
    D3
    134
    Bit 3 of 16-bit data bus
    D4
    136
    Bit 4 of 16-bit data bus
    D5
    Bold, italicized pin names
    indicate pin function after reset.
    GPIO
    General-purpose input/output pin. All GPIOs come up as input after reset.
    §
    It is highly recommended that VCCA be isolated from the digital supply voltage (and VSSA from digital ground) to maintain the specified accuracy
    and improve the noise immunity of the ADC.
    Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high
    #No power supply pin (VDD, VDDO, VSS, or VSSO) should be left unconnected. All power supply pins must be connected appropriately for proper
    device operation.
    LEGEND:
    Internal pullup
    Internal pulldown
    (Typical active pullup/pulldown value is
    ±
    16
    μ
    A.)
    138
    Bit 5 of 16-bit data bus
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