參數資料
型號: TMS320C6414TBGLZ1
廠商: Texas Instruments
文件頁數: 93/146頁
文件大小: 0K
描述: IC FIXED-POINT DSP 532-FCBGA
標準包裝: 60
系列: TMS320C6414T/15T/16T
類型: 定點
接口: 主機接口,McBSP,PCI,UTOPIA
時鐘速率: 1.0GHz
非易失內存: 外部
芯片上RAM: 1.03MB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.20V
工作溫度: 0°C ~ 90°C
安裝類型: 表面貼裝
封裝/外殼: 532-BFBGA,FCBGA
供應商設備封裝: 532-FCBGA(23x23)
包裝: 托盤
配用: TMDXEVM6452-ND - TMDXEVM6452
296-23038-ND - DSP STARTER KIT FOR TMS320C6416
TMS320C6414T, TMS320C6415T, TMS320C6416T
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SPRS226M NOVEMBER 2003 REVISED APRIL 2009
50
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Terminal Functions (Continued)
SIGNAL
TYPE
IPD/
DESCRIPTION
NAME
NO.
TYPE
IPD/
IPU
DESCRIPTION
EMIFB (16-BIT) ADDRESS||k
BEA20
E16
IPU
EMIFB external address (half-word address) (O/Z)
Also controls initialization of DSP modes at reset (I) via pullup/pulldown resistors
Device Endian mode
BEA19
D18
IPU
Also controls initialization of DSP modes at reset (I) via pullup/pulldown resistors
Device Endian mode
BEA20:
0
Big Endian
1
Little Endian (default mode)
BEA18
C18
1
Little Endian (default mode)
Boot mode
BEA[19:18]: 00 –
No boot
01 HPI boot
BEA17
B18
BEA[19:18]: 00 –
No boot
01 HPI boot
10 EMIFB 8-bit ROM boot with default timings (default mode)
11 Reserved
BEA16
A18
11 Reserved
EMIF clock select
BEA15
D17
EMIF clock select
BEA[17:16]: Clock mode select for EMIFA (AECLKIN_SEL[1:0])
00 –
AECLKIN (default mode)
01 CPU/4 Clock Rate
BEA14
C17
01 CPU/4 Clock Rate
10 CPU/6 Clock Rate
11 Reserved
BEA13
B17
11 Reserved
BEA[15:14]: Clock mode select for EMIFB (BECLKIN_SEL[1:0])
00 –
BECLKIN (default mode)
BEA12
A17
BEA[15:14]: Clock mode select for EMIFB (BECLKIN_SEL[1:0])
00 –
BECLKIN (default mode)
01 CPU/4 Clock Rate
10 CPU/6 Clock Rate
BEA11
D16
10 CPU/6 Clock Rate
11 Reserved
BEA10
C16
I/O/Z
IPD
PCI EEPROM Auto-Initialization (EEAI) [C6415T and C6416T devices only]
BEA13:
PCI auto-initialization via external EEPROM
If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must not be pulled up.
BEA9
B16
I/O/Z
IPD
If the PCI peripheral is disabled (PCI_EN pin = 0), this pin must not be pulled up.
0
PCI auto-initialization through EEPROM is disabled (default).
1
PCI auto-initialization through EEPROM is enabled.
BEA8
A16
1
PCI auto-initialization through EEPROM is enabled.
UTOPIA Enable (UTOPIA_EN) [C6415T and C6416T devices only]
BEA11:
UTOPIA peripheral enable (functional)
BEA7
D15
UTOPIA Enable (UTOPIA_EN) [C6415T and C6416T devices only]
BEA11:
UTOPIA peripheral enable (functional)
0
UTOPIA disabled (McBSP1 enabled) [default]
1
UTOPIA enabled (McBSP1 disabled)
BEA6
C15
1
UTOPIA enabled (McBSP1 disabled)
The C6414T device does not support the PCI and UTOPIA peripherals; for proper device
do not
BEA5
B15
The C6414T device does not support the PCI and UTOPIA peripherals; for proper device
operation, do not oppose the internal pulldowns (IPDs) on the BEA13 and BEA11 pins.
Also for proper C6414T device operation, do not oppose the IPDs on the BEA7, BEA8,
BEA4
A15
Also for proper C6414T device operation, do not oppose the IPDs on the BEA7, BEA8,
and BEA9 pins.
BEA3
D14
For proper C6415T device operation, the BEA7 pin must be externally pulled up with a
1-k
resistor.
BEA2
C14
1-k
resistor.
For proper C6416T device operation, the BEA8 and BEA9 pins must be externally
pulled up with a 1-k
resistor.
BEA1
A14
pulled up with a 1-k
resistor.
For more details, see the Device Configurations section of this data sheet.
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-k IPD or IPU resistor. To pull up a signal to the opposite
supply rail, a 1-k
resistor should be used.)
|| These C64x devices have two EMIFs (64-bit EMIFA and 16-bit EMIFB). The prefix “A” in front of a signal name indicates it is an EMIFA signal
whereas a prefix “B” in front of a signal name indicates it is an EMIFB signal. Throughout the rest of this document, in generic EMIF areas of
discussion, the prefix “A” or “B” may be omitted from the signal name.
kTo maintain signal integrity for the EMIF signals, serial termination resistors should be inserted into all EMIF output signal lines.
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