- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365829 > TMS320C203PZA80 16-Bit Digital Signal Processor PDF資料下載
參數(shù)資料
| 型號(hào)： | TMS320C203PZA80 |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 16-Bit Digital Signal Processor |
| 中文描述： | 16位數(shù)字信號(hào)處理器 |
| 文件頁數(shù)： | 80/132頁 |
| 文件大?。?/td> | 1707K |
| 代理商： | TMS320C203PZA80 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁當(dāng)前第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁
SPRS145G
–
JULY 2000
–
REVISED FEBRUARY 2002
80
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
PARAMETER MEASUREMENT INFORMATION
Tester Pin
Electronics
VLOAD
IOL
CT
IOH
Output
Under
Test
50
Where:
IOL
IOH
VLOAD
CT
=
=
=
=
2 mA (all outputs)
300
μ
A (all outputs)
1.5 V
50-pF typical load-circuit capacitance
Figure 22. Test Load Circuit
signal transition levels
The data in this section is shown for the 3.3-V version. Note that some of the signals use different reference
voltages, see the recommended operating conditions table. Output levels are driven to a minimum logic-high
level of 2.4 V and to a maximum logic-low level of 0.8 V.
Figure 23 shows output levels.
0.4 V (VOL)
20%
2.4 V (VOH)
80%
Figure 23. Output Levels
Output transition times are specified as follows:
For a
high-to-low
transition
, the level at which the output is said to be no longer high is below 80% of the
total voltage range and lower and the level at which the output is said to be low is 20% of the total voltage
range and lower.
For a
low-to-high transition
, the level at which the output is said to be no longer low is 20% of the total voltage
range and higher and the level at which the output is said to be high is 80% of the total voltage range and
higher.
Figure 24 shows the input levels.
0.8 V (VIL)
10%
2.0 V (VIH)
90%
Figure 24. Input Levels
Input transition times are specified as follows:
For a
high-to-low transition
on an input signal, the level at which the input is said to be no longer high is 90%
of the total voltage range and lower and the level at which the input is said to be low is 10% of the total voltage
range and lower.
For a
low-to-high transition
on an input signal, the level at which the input is said to be no longer low is 10%
of the total voltage range and higher and the level at which the input is said to be high is 90% of the total
voltage range and higher.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMS320C206PZ-80 | 16-Bit Digital Signal Processor |
| TMS320C206PZA-80 | 16-Bit Digital Signal Processor |
| TMS320C209-57 | Digital Signal Processor |
| TMS320C209PN40 | 16-Bit Digital Signal Processor |
| TMS320C209PN57 | 16-Bit Digital Signal Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320C206 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMS320C206_07 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMS320C206PZ | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DIGITAL SIGNAL PROCESSORS |
| TMS320C206PZ80 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| TMS320C206PZ-80 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。