參數資料
型號： TMS32020GBL
元件分類： 數字信號處理
英文描述： 16-Bit Digital Signal Processor
中文描述： 16位數字信號處理器
文件頁數： 77/132頁
文件大?。?/td> 1707K
代理商： TMS32020GBL
SPRS145G
–
JULY 2000
–
REVISED FEBRUARY 2002
77
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
current consumption by power-supply pins over recommended operating free-air temperature
ranges during low-power modes at 40-MHz CLOCKOUT (TMS320LC2406A)
PARAMETER
MODE
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IDD
Operational Current
LPM0
Clock to all peripherals is enabled.
Clock to all eri herals is enabled.
No I/O pins are switching.
50
70
mA
ICCA
IDD
ADC module current
10
15
mA
Operational Current
LPM1
Clock to all peripherals is disabled.
Clock to all eri herals is disabled.
No I/O pins are switching.
35
45
mA
ICCA
IDD
ICCA
IDD is the current flowing into the VDD, VDDO, and PLLVCCA pins.
If a quartz crystal or ceramic resonator is used as the clock source, the LPM2 mode shuts down the internal oscillator.
ADC module current
0
0
mA
Operational Current
LPM2
Clock to all peripherals is disabled.
Clock to all eri herals is disabled.
Input clock is disabled.
20
100
μ
A
ADC module current
0
0
mA
current consumption by power-supply pins over recommended operating free-air temperature
ranges during low-power modes at 40-MHz CLOCKOUT (TMS320LC2404A)
PARAMETER
MODE
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IDD
Operational Current
LPM0
Clock to all peripherals is enabled.
Clock to all eri herals is enabled.
No I/O pins are switching.
50
70
mA
ICCA
IDD
ADC module current
10
15
mA
Operational Current
LPM1
Clock to all peripherals is disabled.
Clock to all eri herals is disabled.
No I/O pins are switching.
35
45
mA
ICCA
IDD
ICCA
IDD is the current flowing into the VDD, VDDO, and PLLVCCA pins.
If a quartz crystal or ceramic resonator is used as the clock source, the LPM2 mode shuts down the internal oscillator.
ADC module current
0
0
mA
Operational Current
LPM2
Clock to all peripherals is disabled.
Clock to all eri herals is disabled.
Input clock is disabled.
20
100
μ
A
ADC module current
0
0
mA
current consumption by power-supply pins over recommended operating free-air temperature
ranges during low-power modes at 40-MHz CLOCKOUT (TMS320LC2402A)
PARAMETER
MODE
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IDD
Operational Current
LPM0
Clock to all peripherals is enabled.
Clock to all eri herals is enabled.
No I/O pins are switching.
40
60
mA
ICCA
IDD
ADC module current
10
15
mA
Operational Current
LPM1
Clock to all peripherals is disabled.
Clock to all eri herals is disabled.
No I/O pins are switching.
35
45
mA
ICCA
IDD
ICCA
IDD is the current flowing into the VDD, VDDO, and PLLVCCA pins.
If a quartz crystal or ceramic resonator is used as the clock source, the LPM2 mode shuts down the internal oscillator.
ADC module current
0
0
mA
Operational Current
LPM2
Clock to all peripherals is disabled.
Clock to all eri herals is disabled.
Input clock is disabled.
20
100
μ
A
ADC module current
0
0
mA
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