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| 型號： | TMS28F512A-15C3FML |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | GT 37C 37#16 SKT PLUG |
| 中文描述： | 65536 8位快閃記憶體 |
| 文件頁數(shù)： | 16/21頁 |
| 文件大小： | 311K |
| 代理商： | TMS28F512A-15C3FML |
TMS28F512A
65536 BY 8-BIT
FLASH MEMORY
SMJS514C – FEBRUARY 1994 – REVISED AUGUST 1997
16
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
timing requirements — alternative E-controlled writes
ALTERNATE
SYMBOL
’28F512A 10
’28F512A-10
’28F512A 12
’28F512A-12
’28F512A 15
’28F512A-15
’28F512A 17
’28F512A-17
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
tc(W)
Cycle time, write using E
tAVAV
100
120
150
170
ns
tc(E)PR
Cycle time, programming
operation
tEHEH
10
10
10
10
μ
s
th(EA)
th(ED)
th(W)
tsu(A)
tsu(D)
tsu(W)
tsu(VPPEL)
Hold time, address
tELAX
tEHDX
tEHWH
tAVEL
tDVEH
tWLEL
tVPEL
75
80
80
90
ns
Hold time, data
10
10
10
10
ns
Hold time, W
0
0
0
0
ns
Setup time, address
0
0
0
0
ns
Setup time, data
50
50
50
50
ns
Setup time, W before E
0
0
0
0
ns
μ
s
Setup time, VPP to E low
Recovery time, write using E
before read
1.0
1.0
1.0
1.0
trec(E)R
tEHGL
6
6
6
6
μ
s
trec(E)W
Recovery time, read before
write using E
tGHEL
0
0
0
0
μ
s
tw(E)
tw(EH)
Pulse duration, write using E
tELEH
tEHEL
70
70
70
80
ns
Pulse duration, write, E high
20
20
20
20
ns
PARAMETER MEASUREMENT INFORMATION
2.08 V
CL = 100 pF
(see Note A)
Output
Under Test
RL = 800
2.4 V
0.45 V
2 V
0.8 V
2 V
0.8 V
LOAD CIRCUIT
VOLTAGE WAVEFORMS
NOTE A: CL includes probe and fixture capacitance.
Figure 4. Load Circuit and Voltage Waveforms
AC testing inputs are driven at 2.4 V for logic high and 0.45 V for logic low. Timing measurements are made at
2 V for logic high and 0.8 V for logic low on both inputs and outputs. Each device should have a 0.1-
μ
F ceramic
capacitor connected between V
CC
and V
SS
as close as possible to the device pins.
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