參數(shù)資料
型號(hào)： TMS27C512-150
廠商： Texas Instruments, Inc.
英文描述： Programmable Read-Only Memory(64K×8結(jié)構(gòu),可擦可編程只讀存儲(chǔ)器)
中文描述： 可編程只讀存儲(chǔ)器（64K的× 8結(jié)構(gòu)，可擦可編程只讀存儲(chǔ)器）
文件頁(yè)數(shù)： 9/13頁(yè)
文件大?。?/td> 283K
代理商： TMS27C512-150
TMS27C512 524288-BIT UV ERSABLE PROGRAMMABLE
TMS27PC512 524288-BIT PROGRAMMABLE
READ-ONLY MEMORY
SMLS512F – NOVEMBER 1985 – REVISED JUNE 1995
9
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
switching characteristics over recommended ranges of operating conditions
PARAMETER
TEST CONDITIONS
(SEE NOTES 3 AND 4)
’27C512-10
’27PC512-10
’27C512-12
’27PC512-12
UNIT
MIN
MAX
100
MIN
MAX
120
ta(A)
ta(E)
ten(G)
tdis
Access time from address
CL = 100 pF,
1 Series 74 TTL Load,
Input tr
≤
20 ns,
Input tf
≤
20 ns
100 F
ns
Access time from chip enable
100
120
ns
Output enable time from G/VPP
Output disable time from G/VPP or E, whichever occurs first
Output data valid time after change of address, E, or G/VPP,
whichever occurs first
55
55
ns
0
45
0
45
ns
tv(A)
0
0
ns
PARAMETER
TEST CONDITIONS
(SEE NOTES 3 AND 4)
’27C512-15
’27PC512-15
UNIT
MIN
MAX
150
ta(A)
ta(E)
ten(G)
tdis
Access time from address
CL = 100 pF,
1 Series 74 TTL Load,
Input tr
≤
20 ns,
Input tf
≤
20 ns
100 F
ns
Access time from chip enable
150
ns
Output enable time from G/VPP
Output disable time from G/VPP or E, whichever occurs first
Output data valid time after change of address, E, or G/VPP, whichever
occurs first
75
ns
0
60
ns
tv(A)
0
ns
PARAMETER
TEST CONDITIONS
(SEE NOTES 3 AND 4)
’27C512-20
’27PC512-20
’27C512-25
’27PC512-25
UNIT
MIN
MAX
200
MIN
MAX
250
ta(A)
ta(E)
ten(G)
tdis
Access time from address
CL = 100 pF,
1 Series 74 TTL Load,
Input tr
≤
20 ns,
Input tf
≤
20 ns
100 F
ns
Access time from chip enable
200
250
ns
Output enable time from G/VPP
Output disable time from G/VPP or E, whichever occurs first
Output data valid time after change of address, E, or G/VPP,
whichever occurs first
Value calculated from 0.5 V delta to measured output level. This parameter is only sampled and not 100% tested.
75
100
ns
0
60
0
60
ns
tv(A)
0
0
ns
switching characteristics for programming: V
CC
= 6.50 V and G/V
PP
= 13 V (SNAP! Pulse),
T
A
= 25
°
C (see Note 3)
PARAMETER
MIN
MAX
UNIT
tdis(G)
NOTES:
Disable time, output from G/VPP
3. For all switching characteristics the input pulse levels are 0.4 V to 2.4 V. Timing measurements are made at 2 V for logic high and
0.8 V for logic low. (Reference page 10.)
4. Common test conditions apply for tdis except during programming.
0
130
ns
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