參數(shù)資料
型號: TMP320LC2402APGA
元件分類: TVS-瞬態(tài)抑制二極管
英文描述: Transient Voltage Suppressor Diodes
中文描述: 數(shù)字信號處理器| 16位|的CMOS | QFP封裝| 64管腳|塑料
文件頁數(shù): 94/132頁
文件大?。?/td> 1707K
代理商: TMP320LC2402APGA
SPRS145G
JULY 2000
REVISED FEBRUARY 2002
94
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
PARAMETER MEASUREMENT INFORMATION
9
4
SPISOMI
SPISIMO
SPICLK
(clock polarity = 1)
SPICLK
(clock polarity = 0)
Master In Data
Must Be Valid
Master Out Data Is Valid
8
5
3
2
1
SPISTE
The SPISTE signal must be active before the SPI communication stream starts; the SPISTE signal must remain active
until the SPI communication stream is complete.
Figure 40. SPI Master Mode External Timing (Clock Phase = 0)
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