參數(shù)資料
型號: TMP122AIDBVT
元件分類: 溫度/濕度傳感器
英文描述: 1.5∑C Accurate Programmable Digital Temperature Sensors with SPI Interface
中文描述: 1.5ΣC精確可編程數(shù)字溫度傳感器,SPI接口
文件頁數(shù): 9/14頁
文件大小: 277K
代理商: TMP122AIDBVT
TMP122, TMP124
SBOS272B
9
www.ti.com
CONVERSION TIME
(typical)
R1
R0
RESOLUTION
0
0
1
1
0
1
0
1
9 Bits (0.5
°
C) plus sign
10 Bits (0.25
°
C) plus sign
11 Bits (0.125
°
C) plus sign
12 Bits (0.0625
°
C) plus sign
30ms
60ms
120ms
240ms
TABLE XI. Resolution of the TMP122 and TMP124.
CONVERTER RESOLUTION (R1/R0)
The Converter Resolution Bits control the resolution of the
internal Analog-to-Digital (A/D) converter. This allows the user
to maximize efficiency by programming for higher resolution or
faster conversion time. Table XI identifies the Resolution Bits
and the relationship between resolution and conversion time.
The TMP122/TMP124 have a default resolution of 12 bits.
DELAY TIME
The Delay Bits control the amount of time delay between each
conversion. This feature allows the user to maximize power
savings by eliminating unnecessary conversions, and minimiz-
ing current consumption. During active conversion the TMP122/
TMP124 typically requires 50
μ
A of current for approximately
0.25s conversion time, and approximately 20
μ
A for idle times
between conversions. Delay settings are identified in Table XII
as conversion time and period, and are shown in Figure 9.
Default power up is D1/D0 equal 0/0. Conversion time and
conversion periods scale with resolution. Conversion period
denotes time between conversion starts.
D1
D0
CONVERSION TIME
CONVERSION PERIOD
0
0
1
1
0
1
0
1
0.25s
0.25s
0.25s
0.25s
0.25s
0.5s
1s
8s
TABLE XII. Conversion Delay for 12-Bit Resolution.
FIGURE 9. Conversion Time and Period Description.
PARAMETER
MIN
MAX
UNITS
SCK Period
t
1
100
ns
Data In to Rising Edge SCK Setup Time
t
2
20
ns
SCK Falling Edge to Output Data Delay
t
3
30
ns
SCK Rising Edge to Input Data Hold Time
t
4
20
ns
CS to Rising Edge SCK Set-Up Time
t
5
40
ns
CS to Output Data Delay
t
6
30
ns
CS Rising Edge to Output High Impedance
t
7
30
ns
TABLE XIII. Timing Description.
0.25s
D1/D0 = 0/1
D1/D0 = 1/0
D1/D0 = 1/1
12-Bit Resolution
0.25s
1s
8s
0.25s
0.5s
50
μ
A (active)
20
μ
A (idle)
Timing Diagrams
The TMP122/TMP124 are SPI compatible. Figures 10 to 12
describe the various timing parameters of the TMP122/
TMP124 with timing definitions in Table XIII.
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相關代理商/技術參數(shù)
參數(shù)描述
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