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TMB22153AMS100
PRELIMINARY INFORMATION
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Functional Description
The TMB22153AMS100 is designed to demonstrate the
performance of the TMC22x5yA Digital Video Decoder. For
complete descriptions of the TMC22x5yA, TMC2072,
TMC1185, and TMC2242 please refer to part datasheets.
The TMB22153AMS100 is designed to be used in
conjunction with other Fairchild demo boards, namely the
TMC2069P7C DAC, and TMB2193MS100 encoder boards.
The 96 pin edge connectors plug easily into each other.
When used together, the boards demonstrate a high
performance 10-bit digital video decoding system.
TMC22x5yA Digital Video Decoder
The TMC22x5yA accepts digitized video input on two
10-bit buses, “YOVER[9:0]” and “COVER[9:0]”. Based on
the status of its control registers, it then outputs the data to
the output edge connector of the board in a variety of
formats. Please see Table 1 for a listing of board default
video standards and output formats that are loadable to the
control registers.
After the TMC22x5yA control registers have been initially
loaded by the microcontroller, subsequent changes to the
control registers may be made through the R-bus interface
and Raydemo software.
It is important that the control registers be loaded correctly in
order to obtain the desired output. Once the control registers
have been set to output the correct data from the
TMC22x5yA, then several board switches must also be
correctly configured in order to obtain the desired output.
TMC2072 Genlocking Video Digitizer
The TMC2072 Genlocking Video Digitizer accepts analog
composite data through the composite input BNC on the left
side of the board. A 20MHz clock crystal provides the Gen-
lock with an input clock. The TMC2072 outputs horizontal
and vertical syncs, and a 27MHz clock. The clock is used to
drive the Decoder and EPLD. Like the TMC22x5yA, the
Genlock part must be programmed at startup. Instructions on
how to do this are in the “Microcontroller” section of this
documentation.
EPLD
An Altera EPF10K10TC144-4 EPLD executes several
essential board functions. The EPLD serves as a buffer and
multiplexer for data buses and a register for several impor-
tant control signals. These signals may be cross-referenced
to the included schematics. The EPLD control registers may
be modified using the Raydemo software. The Raydemo
EPLD R-bus address is 0000001. For a more complete
description or specification of signals going to or coming
from the TMC22x5yA and TMC2072, please refer to the
Fairchild Semiconductor Data Book (also available on CD-
ROM) or the website at www.fairchildsemi.com.
Microcontroller
An Atmel 89C55 microcontroller is used to program the
TMC22x5yA and TMC2072 registers. The microcontroller
programs the parts through the R-bus at power up and repro-
grams them each time the “Reset” button is pushed. Please
see Table 1 on the next page for a description of available
microcontroller-programmed board configurations.
Table 1. TMB22153AMS100 Demonstration Board Video Standard Selection
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3-0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Input Format
composite
Y/C
composite
Y/C
composite
composite, field-based
composite, field-based
composite, frame-based
composite
Y/C
composite
Y/C
composite
composite, field-based
composite, field-based
reserved
Video Standard
NTSC
NTSC
NTSC
NTSC
NTSC
NTSC
NTSC
NTSC
PAL
PAL
PAL
PAL
PAL
PAL
PAL
Output Format
YUV
YUV
D1
D1
RGB
YUV
D1
YUV
YUV
YUV
D1
D1
RGB
YUV
D1