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參數(shù)資料
| 型號： | TLV990-40PFBG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | GREEN, PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 418K |
| 代理商： | TLV990-40PFBG4 |
TLV99040
3V, 10BIT, 40MSPS AREA CCD ANALOG FRONT END
SLAS326A JANUARY 2001 REVISED MARCH 2004
19
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
automatic optical black and offset correction
In the TLV990-40, the optical black and system channel-offset corrections are performed by an autodigital
feedback loop. Two DACs are used to compensate for both channel offset and optical black offset. A coarse
correction DAC (CDAC) is located before PGA gain stage, and a fine correction DAC (FDAC) is located after
the gain stage. The digital-calibration system is capable of correcting the optical black and channel offset down
to one ADC LSB accuracy.
The TLV990-40 automatically starts autocalibration whenever the OBCLP input is pulled low. The OBCLP pulse
should be wide enough to cover one positive half cycle of the ADCCLK, as shown in Figure 1.
For each line, the optical black pixels plus the channel offset are sampled and converted to digital data by the
ADC. A digital circuit averages the data during the optical black pixels. The averaged result is compared digitally
with the desired output code stored in the Vb register (default is 40H), then the FDAC is adjusted by control logic
to make the ADC output equal to the Vb. If the offset is out of the range of the FDAC (
±225 ADC LSBs), the error
is corrected by both the CDAC and the FDAC. The CDAC increments or decrements by one CDAC LSB,
depending on whether the offset is negative of positive, until the output is within the range of the FDAC. The
remaining residue is corrected by the FDAC.
The relationship among the FDAC, CDAC, and ADC in terms of number of ADC LSBs is as follows:
1 FDAC LSB = 1 ADC LSB,
1 CDAC LSB = PGA linear gain
× n ADC LSB
where n is:
4 for 0
≤ gain code < 64
1.5 for 64
≤ gain code < 96
1 for 96
≤ gain code < 128
1 for 128
≤ gain code
For example, if PGA gain = 2 (6 dB), then, 1 CDAC LSB = 2 x 4 ADC LSBs = 8 ADC LSBs.
After autocalibration is complete, the ADC’s digital output during CCD signal interval can be expressed by the
following equation:
ADC output [D9D0] = CCD_input
× PGA gain + Vb,
Where Vb is the desired black level selected by user. The total offset, including optical black offset, is calibrated
to be equal to the Vb by adjusting the offset correction DACs during autocalibration.
A weighted rolling average of the optical black pixels is taken during averaging. The weighting factor can be
programmed in control register2. The weighting factor determines the speed of convergence of the digital
filtering implemented within the CCD signal processor. Weighting factors closer to 1 result in faster
convergence. As the weighting factor decreases towards its minimum value of 1/128, the speed of convergence
of the digital filtering decreases.
The algorithm also takes hot pixels and cold pixels into consideration. A hot optical black pixel is a defective
pixel that generates too much charge, while a cold pixel is the one that generates very little or no charge. A digital
comparator compares the digitized optical black pixels with user-selected hot and cold pixel limits. If the optical
black pixel value is out of range, then that hot or cold pixel is replaced with the value of the previous pixel.
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