- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98262 > TLV571IDW (TEXAS INSTRUMENTS INC) 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 PDF資料下載
參數(shù)資料
| 型號： | TLV571IDW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| 封裝： | GREEN, PLASTIC, SOIC-24 |
| 文件頁數(shù)： | 26/28頁 |
| 文件大小： | 479K |
| 代理商： | TLV571IDW |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁
TLV571
2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT,
PARALLEL ANALOG-TO-DIGITAL CONVERTER
SLAS239A – SEPTEMBER 1999 – REVISED FEBRUARY 2000
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
start of conversion mechanism
There are two ways to convert data: hardware and software. In the hardware conversion mode the ADC begins
sampling at the falling edge of CSTART and begins conversion at the rising edge of CSTART. Software start
mode ADC samples for 6 clocks, then conversion occurs for ten clocks. The total sampling and conversion
process lasts only 16 clocks in this case. If RD is not detected during the next clock cycle, the ADC automatically
proceeds to a power-down state. Data is valid on the rising edge of INT in both conversion modes.
hardware CSTART conversion
external clock
With CS low and WR low, data is written into the ADC. The sampling begins at the falling edge of CSTART and
conversion begins at the rising edge of CSTART. At the end of conversion, EOC goes from low to high, telling
the host that conversion is ready to be read out. The external clock is active and is used as the reference at all
times. With this mode, it is required that CSTART is not applied at the rising edge of the clock (see Figure 4).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TLV571IPWG4 | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| TLV571IPW | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| TLV5734PAG | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP64 |
| TLV5734PAGG4 | 3-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP64 |
| TLV61224DCKT | BATTERY CHARGE CONTROLLER, PDSO6 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLV571IDWG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8bit SAR A/D RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV571IDWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 1.25 MSPS Single Ch. RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV571IDWRG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 1.25 MSPS Single Ch. RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV571IPW | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8bit SAR A/D RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV571IPWG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 1.25 MSPS Single Ch. RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。