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參數(shù)資料
| 型號： | TLV5639I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2.7 V TO 5.5 V LOW POWER 12-BIT DIGITAL-TO-ANALOG CONVERTERS WITH INTERNAL REFERENCE AND POWER DOWN |
| 中文描述： | 2.7 V至5.5 V低功耗12位數(shù)字到模擬，具有內(nèi)部參考和斷電變換器 |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 242K |
| 代理商： | TLV5639I |
TLV5639C, TLV5639I
2.7 V TO 5.5 V LOW POWER 12-BIT DIGITAL-TO-ANALOG
CONVERTERS WITH INTERNAL REFERENCE AND POWER DOWN
SLAS189 – MARCH 1999
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range, V
ref
= 2.048 V,
V
ref
= 1.024 V (unless otherwise noted)
power supply
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
REF
on
Fast
2.3
2.8
mA
VDD= 5 V
VDD = 5 V
Slow
1.3
1.6
mA
REF
off
Fast
1.9
2.4
mA
IDD
Power supply current
No load,
All inputs = AGND or VDD,
DAC latch = 0x800
Slow
0.9
1.2
mA
REF
on
Fast
2.1
2.6
mA
VDD= 3 V
VDD = 3 V
Slow
1.2
1.5
mA
REF
off
Fast
1.8
2.3
mA
Slow
0.9
1.1
mA
μ
A
Power down supply current
0.01
1
PSRR
Power supply rejection ratio
Zero scale, See Note 2, External reference
–60
dB
Full scale, See Note 3, External reference
–60
NOTES:
2. Power supply rejection ratio at zero scale is measured by varying VDD and is given by:
PSRR = 20 log [(EZS(VDDmax) – EZS(VDDmin))/VDDmax]
3. Power supply rejection ratio at full scale is measured by varying VDD and is given by:
PSRR = 20 log [(EG(VDDmax) – EG(VDDmin))/VDDmax]
static DAC specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
12
bits
INL
Integral nonlinearity, end point adjusted
RL = 10 k
, CL = 100 pF, See Note 4
RL = 10 k
, CL = 100 pF, See Note 5
See Note 6
±
1.2
±
0.3
±
3
LSB
DNL
Differential nonlinearity
±
0.5
±
12
LSB
EZS
EZS TC
Zero-scale error (offset error at zero scale)
LSB
ppm/
°
C
% full
scale V
ppm/
°
C
Zero-scale-error temperature coefficient
See Note 7
20
EG
Gain error
See Note 8
±
0.3
EG TC
NOTES:
Gain error temperature coefficient
4. The relative accuracy or integral nonlinearity (INL) sometimes referred to as linearity error, is the maximum deviation of the output
from the line between zero and full scale excluding the effects of zero code and full-scale errors (see text).
5. The differential nonlinearity (DNL) sometimes referred to as differential error, is the difference between the measured and ideal 1
LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains
constant) as a change in the digital input code.
6. Zero-scale error is the deviation from zero voltage output when the digital input code is zero (see text).
7. Zero-scale-error temperature coefficient is given by: EZSTC = [EZS(Tmax) – EZS(Tmin)]/2Vref
×
106/(Tmax – Tmin).
8. Gain error is the deviation from the ideal output (2Vref – 1 LSB) with an output load of 10 k
excluding the effects of the zero-error.
9. Gain temperature coefficient is given by: EGTC = [EG(Tmax) – EG (Tmin)]/2Vref
×
106/(Tmax – Tmin).
output specifications
See Note 9
20
PARAMETER
TEST CONDITIONS
RL = 10 k
MIN
TYP
MAX
UNIT
VO
Output voltage
VDD–0.4
V
Output load regulation accuracy
VO = 4.096 V, 2.048 V
RL = 2 k
±
0.29
% full
scale V
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