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參數(shù)資料
| 型號： | TLV5619PW |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN |
| 中文描述： | 2.7 V至5.5 V 12位并行數(shù)字至模擬轉(zhuǎn)換器與電源向下 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大?。?/td> | 251K |
| 代理商： | TLV5619PW |
TLV5619
2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER
WITH POWER DOWN
SLAS172C – DECEMBER 1997 – REVISED APRIL 2000
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
TLV5619 interfaced to TMS320C203 DSP
hardware interface
Figure 13 shows an example of the connection between the TLV5619 and the TMS320C203 DSP. The only
other device that is needed in addition to the DSP and the DAC is the 74AC138 address decoding circuit . Using
this configuration, the DAC address is 0x0084 within the I/O memory space of the TMS320C203.
LDAC is held low so that the output voltage is updated with the rising WE edge. The power down mode is
deactivated permanently by pulling PD to V
DD
.
A2
A3
A4
A6
IS
D(0–11)
5 V
A
B
C
G1
G2A
G2B
CS
D(0–11)
Y1
VDD
PD
WE
REFIN
Output
REF191
OUT
LDAC
WE
RLOAD
TMS320C203
74AC138
TLV5619
12
Figure 13. TLV5619 to TMS320C203 DSP Interface Connection
software
No setup procedure is needed to access the TLV5619. The output voltage can be set using one command:
out data_addr, DAC_addr
Where
data_addr
points to the address location (in this example 0x0060) holding the new output voltage data
and
DAC_addr
is the I/O space address of the TLV5619 (in this example 0x0084).
The following code shows, how to use the timer of the TMS320C203 as a time base to generate a voltage ramp
with the TLV5619. A timer interrupt is generated every 205
μ
s. The corresponding interrupt service routine
increments the output code (stored at 0x0060) for the DAC and writes the new code to the TLV5619. Only the
12 LSBs of the data in 0x0060 are used by the DAC, so that the resulting period of the saw waveform is:
τ
= 4096
×
205 E-6 s = 0.84 s
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