參數(shù)資料
型號： TLV5510(中文)
廠商： Texas Instruments, Inc.
英文描述： 2.7V TO 3.6V High-Speed Low Power Reconfigurable Parallel ADC(2.7V至3.6V,單通道,8位,10MSPS并行ADC)
中文描述： 2.7V至3.6V高速低功耗可重構并行ADC（2.7至3.6V的，單通道，8位，高達10MSPS并行模數(shù)轉換器）
文件頁數(shù)： 4/12頁
文件大?。?/td> 721K
代理商： TLV5510(中文)
==1999-3-15==
P&S
oo á|′μ×ó1é· YóDT1
==12-4==
2.3
μìD
2.3.1 V
DDD
=V
DDA
=3V
￡
Vref
￡¨
T
￡
=2.5V
￡
Vref
￡¨
B
￡
=0.5V
￡
f
(CLK)
=10MHz
￡
T
A
=25
ê±μμ
ìD3y· áí óDμ÷￡
êy×
I/O
PARAMETER
TEST CONDITIONS
IIH
High-level input current
VDDD = MAX,
VIH = VDDD
IIL
Low-level input current
VDDD = MAX,
VIL = 0
IOH
High-level output current
OE = GND,
VDDD = MIN,
IOL
Low-level output current
OE = GND,
VDDD = MIN,
High-level high-impedance-state
output leakage current
P &S
oo á|′μ×ó1é· YóDT1
μ :
ot±±ooêD×μèa· 15o
P&Sí í :
http://www.p8s.com
D :
ooêD70020D
óê±à:
430079
μ°:
( 86) ( 027￡87493500 87493506
′
( 86) ( 027) 87491166, 87493497
MIN
TYP
MAX
UNIT
5
5
μ
A
VOH = VDDD 0.5 V
VOL = 0.4 V
1.6
2.6
mA
IOZH
OE = VDDD,
VDDD = MAX
VOH = VDDD
15
μ
A
IOZL
Low-level high-impedance-state
output leakage current
+
±êóD
MIN
ò
MAX
μìtèí1¤×÷ìtDùê ￡
OE = VDDD,
VDDD = MIN
VOL = 0
15
1|ê
PARAMETER
Supply current
TEST CONDITIONS
MIN
TYP
MAX
10
UNIT
mA
IDD
Iref
fsin = 1 MHz sine wave, reference resistor dissipation is separate
REF = REFT REFB = 2 V
4
Reference voltage current
+
±êóD
MIN
ò
MAX
μìtèí1¤×÷ìtDùê ￡
6
10
14
mA
2 ìDü
+
±êóD
MIN
ò
MAX
μìtèí1¤×÷ìtDùê ￡
2.3.2 V
DD
=V
DDA
=3V
￡
Vref
￡¨
T
￡
=2.5V
￡
Vref
￡¨
B
￡
=0.5V
￡
f
(CLK)
=10MHz
￡
T
A
=25
ê±μ1¤
×÷ìD￡¨3y· áí óDμ÷￡
PARAMETER
TEST CONDITIONS
MIN
0.54
1.8
TYP
0.60
MAX
0.72
2.4
UNIT
Self-bias (1), at REFB
Self-bias (1), REFT REFB
Short REFB toREFBS
Short REFT toREFTS
,
2
V
Self-bias (2), at REFT
Reference voltage resistor
Short REFB to AGND,
Between REFT and REFB
Short REFT to REFTS
2.25
140
2.5
200
3
Rref
Ci
260
pF
Analog input capacitance
VI(ANLG) = 1.5 V + 0.07 Vrms
f(CLK) = 10 MHz,
VI = 0.5 V to 2.5 V
16
Integral nonlinearity(INL)
TA = 25 C
TA = 35 C to 85 C
TA = 25 C
TA = 35 C to 85 C
+
0.3
+
0.75
+
1
LSB
Differentialnonlinearity(DNL)
f(CLK) = 10 MHz,
VI = 0.5 V to 2.5 V
REF = REFT REFB = 2 V
REF = REFT REFB = 2 V
+
0.2
+
0.5
+
0.75
EZS
EFS
Zero-scale error
1
4
6
mV
Full-scale error
2
0
0
20
mV
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fconv
Maximum conversion rate
fI = 1-kHz ramp wave form,
VI(ANLG) = 0.5 V 2.5 V
At 1 dB
At 3 dB
0.2
10
MSPS
BW
Analog input bandwidth
17
36
MHz
MHz
td(D)
tAJ
td(s)
ten
tdis
Digital output delay time
CL 10 pF (see Note 1 and Figure 1)
18
30
ns
Aperture jitter time
Sampling delay time
30
4
ps
ns
Enable time, OE to valid data
CL = 10 pF
CL = 10 pF
15
ns
Disable time, OE to high impedance
10
ns
Inputtone = 1 MHz
Input tone = 1 MHz
TA = 25 C
Full range
41
41
Spurious free dynamic range (SFDR)
u
dB
Inputtone = 1 4 MHz
Input tone = 1.4 MHz
TA = 25 C
Full range
TA = 25 C
Full range
38
38
38
SNR
Signal to noise ratio
- -
Inputtone = 1 4 MHz
Input tone = 1.4 MHz
dB
37
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