參數(shù)資料
型號(hào)： TLV320AIC29IRGZRG4
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQCC48
封裝： 7 X 7 MM, GREEN, PLASTIC, QFN-48
文件頁(yè)數(shù)： 52/87頁(yè)
文件大?。?/td> 1051K
代理商： TLV320AIC29IRGZRG4
TLV320AIC29
SLAS494B DECEMBER 2005 REVISED OCTOBER 2007
www.ti.com
56
BIT
FUNCTION
READ/
WRITE
RESET
VALUE
NAME
D1
DASTC
0
R/W
DAC Channel PGA Softstepping control
0 => 0.5 dB change every WCLK
1 => 0.5 dB change every 2 WCLK
D0
ADGAF
0
R
Headset/Aux or Handset PGA Flag
1 => Gain applied = PGA register setting.
0 => Gain applied
≠ PGA Register setting
Note: This flag indicates when the softstepping for PGA is completed.
When AGC is enabled for Headset/Aux or Handset, this bit is readonly and acts as Saturation
Flag. The read value of this bit indicates the following
0 => AGC is not saturated
1 => AGC is saturated (PGA has reached –12 dB or max PGA applicable).
REGISTER 05H: CODEC Power Control
BIT
NAME
RESET VALUE
READ/WRITE
FUNCTION
D15
MBIAS_HND
1
R/W
MICBIAS_HND Powerdown Control
0 => MICBIAS_HND is powered up.
1 => MICBIAS_HND is powered down.
D14
MBIAS_HED
1
R/W
MICBIAS_HED Powerdown Control
0 => MICBIAS_HED is powered up.
1 => MICBIAS_HED is powered down.
D13
ASTPWD
1
R/W
Analog Sidetone Powerdown Control
0 => Analog sidetone powered up
1 => Analog sidetone powered down
D12
SP1PWDN
1
R/W
SPK1(SingleEnded)/OUT32N(Differential) Powerdown Control
0 => SPK1/OUT32N is powered up
1 => SPK1/OUT32N is powered down
D11
SP2PWDN
1
R/W
SPK2 Powerdown Control
0 => SPK2 is powered up
1 => SPK2 is powered down
D10
DAPWDN
1
R/W
DAC Powerdown Control
0 => DAC powered up
1 => DAC powered down
D9
ADPWDN
1
R/W
ADC Powerdown Control
0 => ADC powered up
1 => ADC powered down
D8
VGPWDN
1
R/W
Driver Virtual Ground Powerdown Control
0 => VGND is powered up
1 => VGND is powered down
D7
COPWDN
1
R/W
CP_OUT Powerdown Control
0 => CP_OUT is powered up
1 => CP_OUT is powered down
D6
LSPWDN
1
R/W
Loudspeaker (8
Driver) Powerdown Control
0 => Loudspeaker (8
driver) is powered up
1 => Loudspeaker (8
driver) is powered down
D5
ADPWDF
1
R
ADC Power Down Flag
0 => ADC power down is not complete
1 => ADC power down is complete
D4
LDAPWDF
1
R
DAC Left Power Down Flag
0 => DAC left power down is not complete
1 => DAC left power down is complete
D3
RDAPWDF
1
R
DAC Right Power Down Flag
0 => DAC right power down is not complete
1 => DAC right power down is complete
D2
ASTPWF
1
R
Analog Sidetone Power Down Flag
0 => Analog sidetone power down is not complete
1 => Analog sidetone power down is complete
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