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參數(shù)資料
| 型號： | TLP116 |
| 廠商： | Toshiba Corporation |
| 英文描述： | Digital Isolation for A/D,D/A Conversion. High Speed Line Receiver. Microprocessor System Interfaces. Plasma Display Panel. |
| 中文描述： | 數(shù)字隔離/研發(fā)，D / A轉(zhuǎn)換為A。高速線路接收器。微處理器系統(tǒng)接口。等離子顯示器。 |
| 文件頁數(shù)： | 4/5頁 |
| 文件大小： | 75K |
| 代理商： | TLP116 |
TLP116
4
2003-10-21
Switching Characteristics
(Unless otherwise specified, Ta=-40 to 100
°
C,VCC=4.5~5.5V
CHARACTERISTIC
SYMBOL
TEST
CIR-
CUIT
CONDITION
MIN.
TYP.
MAX.
UNIT
propagation Delay Time
to Logic High output
tpHL
IF=0
12mA
—
—
60
ns
propagation Delay Time
to Logic Low output
tpLH
1
IF=12
0mA
R
IN
=100
CL=15pF
(Note 4)
—
—
60
ns
propagation Delay Time
to Logic High output
tpHL
V
IN
=0
(IF=0
5V
8mA)
—
—
60
ns
propagation Delay Time
to Logic Low output
tpLH
2
V
IN
=5
(IF=8
0V
0mA)
R
IN
=470
C
IN=
27pF
CL=15pF
(Note 4)
—
—
60
ns
Switching Time Dispersion
between ON and OFF
|tpHL-
tpLH|
IF=12mA , R
IN
=100
CL=15pF (Note 4)
,
—
—
30
ns
Output Fall Time(90-10%)
IF=0
12mA
—
—
ns
Output Rise Time(10-90%)
1
IF=12
0mA
R
IN
=100
CL=15pF
(Note 4)
—
—
ns
Common Mode transient
Immunity at High Level
Output
CMH
VCM=1000Vp-p,IF=0mA,
Vo(Min)=4V,Ta=25
°
C
10000
—
—
V/us
Common Mode transient
Immunity at Low Level
Output
CML
VCM=1000Vp-p,IF=12mA,
Vo(Max)=0.4V,Ta=25
°
C
-10000
—
—
V/us
*All typical values are at Ta=25
°
C
Note 4 : CL is approximately 15pF which includes probe and Jig/stray wiring capacitance.
TEST CIRCUIT 1 : tpHL , tpLH
I
=12mA(P.G)
(f=5MHz , duty=50%)
VCC
TEST CIRCUIT 2 : tpHL , tpLH
V
IN
=5V(P.G)
(f=5MHz , duty=50%)
0.1uF
V
CC
R
IN
=100
INPUT
MONITORING
CL=15pF
CL=15pF
Vo
MONITORING
NODE
GND
SHIELD
50%
VOL
VOH
0.1uF
V
CC
R
IN
=470
C
IN
=27pF
CL=15pF
The PROBE and JIG capacitances are included in CL.
(P.G) : Pulse Generatior
Vo
MONITORING
NODE
CL=15pF
INPUT MONITORING NODE
VCC
GND
SHIELD
50%
VOL
VOH
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