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參數(shù)資料
| 型號： | TLE7469GV53 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Dual Low Drop Voltage Regulator |
| 中文描述： | 雙低壓降穩(wěn)壓器 |
| 文件頁數(shù)： | 16/21頁 |
| 文件大?。?/td> | 240K |
| 代理商： | TLE7469GV53 |
V
I
t
A E T03532.V S D
V
Q 1
t
V
R T 1
V
Q 2
t
V
R T 2
V
R O
t
V
R O L
V
R O H
T
R D
T
R D
T
R D
T
R R
T
R R
Final Data Sheet
16
Rev. 1.3, 2004-10-28
TLE 7469
Figure 5
Reset Function and Timing Diagram
Watchdog Operation
The watchdog uses a fraction of the charge pump oscillator’s clock signal as timebase.
Connecting the DT pin to Q1 or to Q2 the watchdog timebase can be adjusted. The
watchdog can be turned off by a low level (
V
DT
≤
0.8 V) applied to the DT pin. The timing
values used in this text refer to typ. values with DT connected to Q1 (fast timing).
Figure 6
shows the state diagram of the window watchdog (WWD). After power-on, the
reset output signal at the RO pin (microcontroller reset) is kept LOW for the reset delay
time T
RD
of typ. 8 ms. With the LOW to HIGH transition of the signal at RO the device
starts the ignore window time
t
CW
(32 ms). During this window the signal at the WDI pin
is ignored. Next the WWD starts the open window. When a valid trigger signal is detected
during the open window a closed window is initialized immediately. A trigger signal within
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