參數(shù)資料
型號: TLE4254EJS
廠商: INFINEON TECHNOLOGIES AG
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: GREEN, PLASTIC, MS-012BA, SOP-8
文件頁數(shù): 19/21頁
文件大?。?/td> 451K
代理商: TLE4254EJS
Data Sheet
7
Rev. 1.2, 2009-11-18
TLE4254
General Product Characteristics
4.2
Functional Range
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Thermal Resistance
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Max.
4.2.1
Input Voltage
V
I
445
V
V
I VQ + Vdr
4.2.1
Adjust / Enable Input Voltage
(Voltage Tracking Range)
V
ADJ/EN
2.0
V
4.2.2
Junction Temperature
T
j
-40
150
°C–
4.2.3
Output Capacitor
C
Q
1–
F
1)
1) Not subject to production test; specified by design.
4.2.4
ESR
CQ
–5
1)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
PG-DSO-8:
4.3.1
Junction to Ambient
R
thJA
155
K/W
Footprint only 1) 2)
1) Not subject to production test; specified by design.
2) Package mounted on PCB FR4; 80 x 80 x 1.5 mm; 35 m Cu, 5 m Sn; horizontal position; zero airflow.
4.3.2
96
K/W
300 mm2 PCB heatsink area 1) 2)
4.3.3
86
K/W
600 mm2 PCB heatsink area 2) 1)
PG-DSO-8 exposed pad:
4.3.4
Junction to Case
R
thJC
15
K/W
measured to exposed pad
4.3.5
Junction to Ambient
R
thJA
–47
K/W
3)
3) Specified
R
thJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70m Cu, 2 x 35m Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
4.3.6
159
K/W
Footprint only 2) 1)
4.3.7
71
K/W
300 mm2 PCB heatsink area 2) 1)
4.3.8
60
K/W
600 mm2 PCB heatsink area 2) 1)
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