參數(shù)資料
型號(hào): TLC540I
廠商: Texas Instruments, Inc.
英文描述: MOSFET N-CH 100V 41A TO-247AC
中文描述: 8位模擬到數(shù)字與串行控制和11變換器輸入端
文件頁(yè)數(shù): 10/11頁(yè)
文件大?。?/td> 164K
代理商: TLC540I
TLC540I, TLC541I
8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 INPUTS
SLAS065A – OCTOBER 1983 – REVISED MARCH 1995
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
It is possible to connect SYSTEM CLOCK and I/O clock together in special situations in which controlling circuitry
points must be minimized. In this case, the following special points must be considered in addition to the requirements
of the normal control sequence previously described.
1.
The first two clocks are required for this device to recognize CS is at a valid low level when the common clock
signal is used as an I/O CLOCK. When CS is recognized by the device to be at a high level, the common clock
signal is used for the conversion clock also.
2.
A low CS must be recognized before the I/O CLOCK can shift in an analog channel address. The device
recognizes a CS transition when the SYSTEM CLOCK terminal receives two positive edges and then a
negative edge. For this reason, after a CS negative edge, the first two clock cycles do not shift in the address.
Also, upon shifting in the address, CS must be raised after the eighth valid (10 total) I/O CLOCK. Otherwise,
additional common clock cycles are recognized as I/O CLOCKS and will shift in an erroneous address.
For certain applications, such as strobing applications, it is necessary to start conversion at a specific point in time.
This device accommodates these applications. Although the on-chip sample and hold begins sampling upon the
negative edge of the fourth valid I/O clock cycle, the hold function is not initiated until the negative edge of the eighth
valid I/O clock cycle. Thus, the control circuitry can leave the I/O clock signal in its high state during the eighth valid
I/O clock cycle until the moment at which the analog signal must be converted. The TLC540/TLC541 continues
sampling the analog input until the eighth falling edge of the I/O clock. The control circuitry or software then
immediately lowers the I/O clock signal and holds the analog signal at the desired point in time and start conversion.
Detailed information on interfacing to most popular microprocessors is readily available from the factory.
相關(guān)PDF資料
PDF描述
TLC541I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 INPUTS
TLC542(中文) 8-Bit Analog-To-Digital Converters With Serial Control And 11 Inputs(串行控制,40ksps,12通道,8位ADC)
TLC542C 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 INPUTS
TLC542I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 INPUTS
TLC545(中文) 8-Bit Analog-To-Digital Converters With Serial Control And 11 Inputs(串行控制,76ksps,20通道,8位ADC)
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TLC540IDW 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8bit ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLC540IDWG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8Bit 75kSPS Serial Out On-Chip RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLC540IDWR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8Bit 75kSPS Serial Out On-Chip RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLC540IDWRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8Bit 75kSPS Serial Out On-Chip RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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