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參數(shù)資料
| 型號： | TLC320AD56C |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Sigma-Delta Analog Interface Circuit |
| 中文描述： | sigma - delta模擬接口電路 |
| 文件頁數(shù)： | 13/43頁 |
| 文件大?。?/td> | 240K |
| 代理商： | TLC320AD56C |
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1–7
Frame Sync and
Sampling Period
f
s
Frame-Sync Interval
The time between the falling edges of successive primary frame-sync signals.
The sampling frequency that is the reciprocal of the sampling period.
The time period occupied by 16 shift clocks. It goes high on the sixteenth rising
edge of SCLK after the falling edge of the frame sync.
This term refers to all signal processing circuits between the analog input and the
digital conversion results at DOUT.
This term refers to all signal processing circuits between the digital data word
applied to DIN and the differential output analog signal available at OUTP and
OUTM.
Any processing system that interfaces to DIN, DOUT, SCLK, or FS.
Bit position in the primary data word (xx is the bit number).
Bit position in the secondary data word (xx is the bit number).
The alpha character d represents valid programmed or default data in the control
register format (see section 3.2 Secondary Serial Communications) when
discussing other data bit portions of the register.
The alpha character X represents a do-not-care bit position within the control
register format.
Finite duration impulse response.
ADC Channel
DAC Channel
Host
Dxx
DSxx
d
X
FIR
1.7
There are three data and control registers that are used as follows:
Register 0
The No-Op register. The 0 address allows secondary requests without altering any other
register.
Register Functional Summary
Register 1
The Control 1 register. The data in this register controls:
The software reset
The software power down
Selection of the normal or auxiliary analog inputs
Selection of the digital loopback
16-bit or 15-bit mode of operation
Selection of monitor amp output
Register 2
The Control 2 register. The data in this register:
Contains the output flag indicating a decimator FIR filter overflow
Contains Flag 0 and Flag 1 output values for use in the phone mode
Selects the phone mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| tlc320ad56c | Sigma-Delta Analog Interface Circuit(Sigma-Delta 模擬接口電路) |
| TLC320AD57(中文) | Sigma-Delta Analog Interface Circuit(Sigma-Delta立體聲音頻ADC) |
| TLC320AD57C | Sigma-Delta Stereo Analog-to-Digital Converter |
| TLC320AD58(中文) | Sigma-Delta Analog Interface Circuit(Sigma-Delta立體聲音頻ADC) |
| TLC320AD58C | Sigma-Delta Stereo Analog-to-Digital Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLC320AD56CFN | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TLC320AD56CPT | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TLC320AD57 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Sigma-Delta Stereo Analog-to-Digital Converter |
| TLC320AD57C | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Sigma-Delta Stereo Analog-to-Digital Converter |
| TLC320AD57CDW | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Sigma-Delta Stereo Analog-to-Digital Converter |
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