參數(shù)資料
型號(hào)： TLC2933PWLE
廠商： Texas Instruments, Inc.
英文描述： HIGH-PERFORMANCE PHASE-LOCKED LOOP
中文描述： 高性能鎖相環(huán)
文件頁(yè)數(shù)： 3/21頁(yè)
文件大小： 367K
代理商： TLC2933PWLE
TLC2933
HIGH-PERFORMANCE PHASE-LOCKED LOOP
SLAS136A – APRIL 1996 – REVISED JUNE 1997
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
VCO inhibit function
The VCO has an externally controlled inhibit function which inhibits the VCO output. A high level on the VCO
INHIBIT terminal stops the VCO oscillation and powers down the VCO. The output maintains a low level during
the power-down mode as shown in Table 1.
Table 1. VCO Inhibit Function
VCO INHIBIT
VCO OSCILLATOR
VCO OUT
IDD(VCO)
Normal
Low
Active
Active
High
Stopped
Low level
Power Down
PFD operation
The PFD is a high-speed, edge-triggered detector with an internal charge pump. The PFD detects the phase
difference between two frequency inputs supplied to FIN–A and FIN–B as shown in Figure 2. Nominally the
reference is supplied to FIN–A, and the frequency from the external counter output is fed to FIN–B. For clock
recovery PLL systems, other types of phase detectors should be used.
FIN–A
FIN–B
PFD OUT
VOH
Hi-Z
VOL
Figure 2. PFD Function Timing Chart
PFD inhibit control
A high level on the PFD INHIBIT terminal places PFD OUT in the high-impedance state and the PFD stops
phase detection as shown in Table 2. A high level on the PFD INHIBIT terminal can also be used as the
power-down mode for the PFD.
Table 2. VCO Output Control Function
PFD INHIBIT
DETECTION
PFD OUT
IDD(PFD)
Normal
Low
Active
Active
High
Stopped
Hi-Z
Power Down
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