參數(shù)資料
型號: TLC2555EVM
廠商: Texas Instruments
文件頁數(shù): 3/28頁
文件大?。?/td> 0K
描述: EVAL MOD FOR TLC2555
產(chǎn)品培訓(xùn)模塊: Data Converter Basics
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 1
位數(shù): 12
采樣率(每秒): 400k
數(shù)據(jù)接口: 串行
工作溫度: -40°C ~ 85°C
已用 IC / 零件: TLC2555
已供物品:
相關(guān)產(chǎn)品: TLC2555IDG4-ND - IC ADC 12BIT SER 400K 8SOIC
TLC2555IDGKG4-ND - IC ADC 12BIT SNGL LOW-PWR 8-MSOP
296-2916-5-ND - IC 12BIT 400 KSPS A/D S/O 8-MSOP
296-2915-5-ND - IC 12BIT 400 KSPS ADC S/O 8-SOIC
其它名稱: 296-20573
TLC2555EVM-ND
TLC2551, TLC2552, TLC2555
5-V, LOW-POWER, 12-BIT, 175/360 KSPS,
SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTOPOWER DOWN
SLAS276D – MARCH 2000 – REVISED MAY 2003
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
ac specifications (fi = 20 kHz)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SINAD
Signal-to-noise ratio + distortion
400 KSPS, VDD = VREF = 5 V
70
72
dB
THD
Total harmonic distortion
400 KSPS, VDD = VREF = 5 V
–84
–80
dB
ENOB
Effective number of bits
400 KSPS, VDD = VREF = 5 V
11.8
bits
SFDR
Spurious free dynamic range
400 KSPS, VDD = VREF = 5 V
–84
–80
dB
Analog Input
Full-power bandwidth, –3 dB
1
MHz
Full-power bandwidth, –1 dB
500
kHz
external reference specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Reference input voltage
VDD = 4.5 V to 5.5 V
2
VDD
V
Reference input impedance
V5 5 V
CS = 1,
SCLK = 0
100
M
Reference input impedance
VDD = 5.5 V
CS = 0,
SCLK = 20 MHz
20
25
k
Reference current
VDD = VREF = 5.5 V
100
400
A
Reference input capacitance
VV
5 5 V
CS = 1,
SCLK = 0
5
15
pF
Reference input capacitance
VDD = VREF = 5.5 V
CS = 0,
SCLK = 20 MHz
20
45
50
pF
VREF
Reference voltage
VDD = 4.5 V to 5.5 V
VDD
V
dc specification, VDD = VREF = 4.5 V to 5.5 V, SCLK frequency = 20 MHz (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INL
Integral linearity error (see Note 4)
±0.6
±1
LSB
DNL
Differential linearity error
See Note 3
±0.5
±1
LSB
E
Offset error (see Note 5)
See Note 3
TLC2551/52
±1.5
LSB
EO
Offset error (see Note 5)
See Note 3
TLC2555
±2.5
LSB
E
Gain error (see Note 5)
See Note 3
TLC2551/52
±2
LSB
EG
Gain error (see Note 5)
See Note 3
TLC2555
±5
LSB
E
Total unadjusted error (see Note 6)
See Note 3
TLC2551/52
±2
LSB
Et
Total unadjusted error (see Note 6)
See Note 3
TLC2555
±5
LSB
NOTES:
3. Analog input voltages greater than that applied to VREF convert as all ones (111111111111).
4. Linear error is the maximum deviation from the best straight line through the A/D transfer characteristics.
5. Zero error is the difference between 000000000000 and the converted output for zero input voltage: full-scale error is the difference
between 111111111111 and the converted output for full-scale input voltage.
6. Total unadjusted error comprises linearity, zero, and full-scale errors.
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