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參數(shù)資料
| 型號(hào)： | TLC1541N |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 10-BIT ANALOG-TO-DIGITAL CONVERTER WITH SERIAL CONTROL AND 11 INPUTS |
| 中文描述： | 10位模擬到數(shù)字與串行控制和11轉(zhuǎn)換器輸入 |
| 文件頁(yè)數(shù)： | 6/11頁(yè) |
| 文件大?。?/td> | 161K |
| 代理商： | TLC1541N |
TLC1541
10-BIT ANALOG-TO-DIGITAL CONVERTER
WITH SERIAL CONTROL AND 11 INPUTS
SLAS073C – DECEMBER 1995 – REVISED AUGUST 1996
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
operating characteristics over recommended operating temperature range,
V
CC
= V
ref+
= 4.75 V to 5.5 V, f
clock(I/O)
= 1.1 MHz, f
clock(SYS)
= 2.1 MHz
PARAMETER
TEST CONDITIONS
MIN
MAX
±
1
±
1
±
1
±
1
UNIT
EL
EZS
EFS
ET
Linearity error
See Note 5
LSB
Zero-scale error
See Notes 2 and 6
LSB
Full-scale error
See Notes 2 and 6
LSB
Total unadjusted error
See Note 7
LSB
Self-test output code
Input A11 address = 1011 (see Note 8)
0111110100
(500)
1000001100
(524)
tconv
Conversion time
21
μ
s
μ
s
I/O
clock
cycles
Total access and conversion time
31
Channel acquisition time (sample cycle)
See Operating Sequence
6
tv
Time output data remains valid after I/O
CLOCK
↓
Delay time, I/O CLOCK
↓
to DATA OUT valid
Output enable time
10
ns
td
ten
tdis
tr(bus)
tf(bus)
NOTES:
400
ns
150
ns
Output disable time
See Figure 1
150
ns
Data bus rise time
Data bus fall time
300
300
ns
ns
2. Analog input voltages greater than that applied to REF+ convert as all ones (1111111111), while input voltages less than that applied
to REF– convert as all zeros (0000000000). For proper operation, REF+ voltage must be at least 1 V higher than REF– voltage.
Also, the total unadjusted error may increase as this differential reference voltage falls below 4.75 V.
5. Linearity error is the maximum deviation from the best straight line through the A/D transfer characteristics.
6. Zero-scale error is the difference between 0000000000 and the converted output for zero input voltage; full-scale error is the
difference between 1111111111 and the converted output for full-scale input voltage.
7. Total unadjusted error includes linearity, zero-scale, and full-scale errors.
8. Both the input address and the output codes are expressed in positive logic. The A11 analog input signal is internally generated and
used for test purposes.
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