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參數(shù)資料
| 型號： | TL811 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | STB/PVR Controller IC |
| 中文描述： | 機(jī)頂盒/殘余尿控制芯片 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 199K |
| 代理商： | TL811 |
GLOBAL AND SCALABLE ARCHITECTURE
The STB/PVR Controller IC from TeraLogic is a key element of its global and scalable architecture for Digital TV. It interfaces
seamlessly to TeraLogic
s Digital TV Decoder ICs to create a versatile solution to design consumer electronics products such
as Digital Set-Top Boxes, Digital TV sets and Personal Video Recorders (PVR) for cable, satellite or terrestrial broadcast. These
functions are integrated in a single IC
multiple transport demux, descramblers, conditional access, PCI bridge, CPU local bus,
I
2
C, SmartCard interfaces, IDE interface, UART and GPIOs. This system-on-a-chip approach provides a very cost-effective
solution by eliminating either the need to use discrete solutions or costly ASIC development.
This IC address ES worldwide Digital TV requirements by incorporating four transport streams I/Os and multiple demultiplexers
that are compatible with ATSC, ARIB, DVB, and DIRECTV
¨
. The universal appeal of this device is enhanced by the
inclusion of DVB, DIRECTV DES-ECB, MPEG DES, Triple DES-CBC and
Multi-2 descrambling schemes.
The Controller IC can be used to design next generation PVR devices with
advanced features or to upgrade an existing Set-Top Box to include PVR functions.
The multiple transport inputs enable consumer-pleasing capabilities such as the
ability to simultaneously watch and record or to have digital picture-in-picture on
any television set.
Multiple-transport, multiple-descrambler Controller IC for Consumer Electronic OEMs
to manufacture Digital TV sets, Digital Set Top Boxes and Personal Video Recorders
TL811
STB/PVR Controller IC
CPU
SDRAM
(Unified for CPU)
PCI BUS
Memory
Controller
Loca
Cont
PCI Bus
Transport In & Out
Local Bus
Transport In
Transport In
Descrambler
2
Descrambler
1
T/S in
3
T/S in 2
T/S in
1
Demux
1
Demux
2
PVR I/O
IDE
DTV I/O
I2C
SmartCards
GPIO
UART
IDE
I2C
SmartCard
GPIO
UART
Transport Out
T/S Out
A
/
CPU Interface
(SysAD Bus)
TL81X BLOCK DIAGRAM
i
c
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