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參數(shù)資料
| 型號： | TIBPAL20R4-5CJT |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | HIGH-PERFORMANCE IMPACT-X PAL CIRCUITS |
| 中文描述： | 高性能影響X PAL制式電路 |
| 文件頁數(shù)： | 24/35頁 |
| 文件大?。?/td> | 439K |
| 代理商： | TIBPAL20R4-5CJT |
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TIBPAL20R4-5C, TIBPAL20R6-5C, TIBPAL20R8-5C
HIGH-PERFORMANCE
IMPACT-X
PAL
CIRCUITS
SRPS010F – D3353, OCTOBER 1989 – REVISED SEPTEMBER 1992
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
24
By using the described test circuit, MTBF can be determined for several different values of
t (see Figure 9).
Plotting this information on semilog scale demonstrates the metastable characteristics of the selected flip-flop.
Figure 11 shows the results for the TIBPAL20’-5C operating at 1 MHz.
0
10
20
30
t (ns)
40
50
60
70
M
101
102
103
104
105
106
107
108
109
fclk = 1 MHz
fdata = 500 kHz
10 yr
1 yr
1 mo
1 wk
1 day
1 hr
1 min
10 s
Figure 11. Metastable Characteristics
From the data taken in the above experiment, an equation can be derived for the metastable characteristics at
other clock frequencies.
The metastable equation:
MTBF
The constants C1 and C2 describe the metastable characteristics of the device. From the experimental data,
these constants can be solved for: C1 = 4.37 X 10
–3
and C2 = 2.01
1
fSCLKx fdatax C1 e(
C2 x
t)
Therefore
MTBF
1
fSCLKx fdatax 4.37 x 10
3e(
2.01 x
t)
definition of variables
DUT (Device Under Test): The DUT is a 5-ns registered PLD programmed with the equation Q : = D.
MTBF (Mean Time Between Failures): The average time (s) between metastable occurrences that cause a
violation of the device specifications.
f
SCLK
(system clock frequency): Actual clock frequency for the DUT.
f
data
(data frequency): Actual data frequency for a specified input to the DUT.
C1: Calculated constant that defines the magnitude of the curve.
C2: Calculated constant that defines the slope of the curve.
t
rec
(metastability recovery time): Minimum time required to guarantee recovery from metastability, at a given
MTBF failure rate. t
rec
=
t – t
pd
(CLK to Q, max)
t: The time difference (ns) from when the synchronizing flip-flop is clocked to when its output is sampled.
The test described above has shown the metastable characteristics of the TIBPAL20R4/R6/R8-5C series. For
additional information on metastable characteristics of Texas Instruments logic circuits, please refer to TI
Applications publication SDAA004, ”Metastable Characteristics, Design Considerations for ALS, AS, and LS
Circuits.’’
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