參數(shù)資料
型號: TIBPAL16R4-15MFK
廠商: Texas Instruments, Inc.
英文描述: HIGH-PERFORMANCE IMPACT E PAL CIRCUITS
中文描述: 高性能影響電路的位置PAL制式
文件頁數(shù): 12/13頁
文件大?。?/td> 249K
代理商: TIBPAL16R4-15MFK
TIBPAL16L8-15M TIBPAL16R4-15M TIBPAL16R6-15M TIBPAL16R8-15M
HIGH-PERFORMANCE
IMPACT
PAL
CIRCUITS
SRPS018A – D3338, JANUARY 1986 – REVISED MAY 1996
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
tsu
S1
From Output
Under Test
Test
Point
R2
CL
(see Note A)
LOAD CIRCUIT FOR
3-STATE OUTPUTS
3 V
0
1.5 V
1.5 V
th
1.5 V
Timing
Input
Data
Input
Input
In-Phase
Output
Out-of-Phase
Output
(see Note D)
tpd
tpd
tpd
tpd
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOH
VOH
VOL
VOL
3 V
0
3 V
0
1.5 V
1.5 V
1.5 V
1.5 V
tw
High-Level
Pulse
Low-Level
Pulse
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
1.5 V
1.5 V
3 V
0
3.3 V
VOL
+
0.5 V
VOL
VOH
VOH – 0.5 V
0 V
ten
ten
tdis
tdis
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATIONS
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
R1
3 V
3 V
0
0
5 V
NOTES: A. CL includes probe and jig capacitance and is 50 pF for tpd and ten, 5 pF for tdis.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses have the following characteristics: PRR
10 MHz, tr and tf
2 ns, duty cycle = 50%.
D. When measuring propagation delay times of 3-state outputs, switch S1 is closed.
E. Equivalent loads may be used for testing.
Figure 1. Load Circuit and Voltage Waveforms
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