PD = Maximum power dissipation of THS403x IC (watts) T
參數(shù)資料
型號: THS4031CDR
廠商: Texas Instruments
文件頁數(shù): 24/47頁
文件大?。?/td> 0K
描述: IC OPAMP VFB 100MHZ SGL 8SOIC
標準包裝: 2,500
放大器類型: 電壓反饋
電路數(shù): 1
轉(zhuǎn)換速率: 100 V/µs
-3db帶寬: 100MHz
電流 - 輸入偏壓: 3µA
電壓 - 輸入偏移: 500µV
電流 - 電源: 8.5mA
電流 - 輸出 / 通道: 90mA
電壓 - 電源,單路/雙路(±): 9 V ~ 32 V,±4.5 V ~ 16 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
配用: 296-10029-ND - EVAL MOD FOR THS4031
P
D +
T
MAX
–T
A
q
JA
Where:
PD
= Maximum power dissipation of THS403x IC (watts)
TMAX = Absolute maximum operating junction temperature (125°C)
TA
= Free-ambient air temperature (
°C)
θJA = θJC + θCA
θJC = Thermal coefficient from junction to case
θCA = Thermal coefficient from case to ambient air (°C/W)
MAXIMUMPOWERDISSIPATION
AMBIENTTEMPERATURE
vs
0
0.5
1
1.5
2
2.5
3
-40
-20
0
20
40
60
80
100
TA-Free AirTemperature-°C
MaximumPowerDissipation-W
DGNPackage
=58.4C/W2oz.
TraceandCopperPad
WithSolder
q
JA
T =130C
J
DGNPackage
=158.4C/W2oz.
TraceandCopperPad
WithoutSolder
q
JA
SOICPackage
High-KTestPCB
=98C/W
q
JA
SOICPackage
High-KTestPCB
=166.7C/W
q
JA
SLOS224G – JULY 1999 – REVISED MARCH 2010
www.ti.com
The actual thermal performance achieved with the THS403xDGN in its PowerPAD package depends on the
application. In the example above, if the size of the internal ground plane is approximately 3 inches × 3 inches
(7,62 cm × 7,62 cm), then the expected thermal coefficient, qJA, is about 58.4°C/W. For comparison, the
non-PowerPAD version of the THS403x IC (SOIC) is shown. For a given qJA, the maximum power dissipation
is shown in Figure 62 and is calculated by the following formula:
(3)
Results are with no air flow and PCB size = 3”× 3” (7,62 cm x 7,62 cm)
Figure 62. Maximum Power Dissipation vs Free-Air Temperature
More complete details of the PowerPAD installation process and thermal management techniques can be found
in the Texas Instruments technical brief, PowerPAD Thermally-Enhanced Package (SLMA002). This document
can be found at the TI web site (www.ti.com) by searching on the key word PowerPAD. The document can also
be ordered through your local TI sales office. Refer to literature number SLMA002 when ordering.
The next thing to be considered is package constraints. The two sources of heat within an amplifier are quiescent
power and output power. The designer should never forget about the quiescent heat generated within the device,
especially multiamplifier devices. Because these devices have linear output stages (Class A-B), most of the heat
dissipation is at low output voltages with high output currents. Figure 63 to Figure 66 shows this effect, along with
the quiescent heat, with an ambient air temperature of 50°C. When using VCC = ±5 V, heat is generally not a
problem, even with SOIC packages. But, when using VCC = ±15 V, the SOIC package is severely limited in the
amount of heat it can dissipate. The other key factor when looking at these graphs is how the devices are
mounted on the PCB. The PowerPAD devices are extremely useful for heat dissipation. But, the device should
30
Copyright 1999–2010, Texas Instruments Incorporated
Product Folder Link(s): THS4031 THS4032
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