參數(shù)資料
型號: THS1403EVM
廠商: Texas Instruments, Inc.
英文描述: THS1403EVM(THS1403評估板)
中文描述: THS1403EVM(THS1403評估板)
文件頁數(shù): 7/39頁
文件大?。?/td> 523K
代理商: THS1403EVM
Purpose
1-2
1.1
Purpose
The THS14xx/5691EVM evaluation module (EVM) provides a platform for
evaluating the THS14XX analog-to-digital converter (ADC) and the THS56XX
digital-to-analog converter (DAC) under various signal, reference, and supply
conditions.
Note:
The EVM in its current implementation supports only the THS14XX device
family and associated circuitry. Support for the THS56XX family will become
available at a later date. As a result of this, only the operation of the THS14XX
and its associated circuitry will be described in this user’s guide.
1.2
EVM Basic Functions
Analog input to the ADC is provided via two external SMB connectors. This in-
put can be configured onboard to be true differential or single-ended trans-
former-coupled to the input of the device.
The EVM provides an external SMB connection for ADC clock input. This can
be configured to be either ac- or dc-coupled. A site provided on the board for
a crystal oscillator to perform this function can be populated if required. Further
provision is made to run the ADC from a DSP timer if desired.
Output from the EVM takes place via two 80-pin daughtercard connectors. The
digital lines from the ADC are buffered before going to the daughtercard con-
nectors. More information on these connectors can be found in the
TMS320C6000 daughtercard specification.
The EVM is powered by 4-mm banana sockets. Separate input connectors are
provided for the analog and digital supplies. Provision is made to supply the
EVM from the motherboard through the daughtercard connectors.
The EVM has onboard logic that controls the memory mapping of the ADC
within the motherboard’s peripheral memory space.
1.3
Power Requirements
The EVM can be powered directly through the daughtercard connector’s
+3.3-V supply. Provision has also been made to allow the EVM to be powered
with independent +3.3-V analog and digital supplies where ultimate perfor-
mance demands.
Voltage Limits
Exceeding the +3.3-V maximum can damage EVM components.
Undervoltage may cause improper operation of some or all of the
EVM components
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