參數(shù)資料
型號(hào)： THS1230IPWG4
廠商： Texas Instruments
文件頁(yè)數(shù)： 3/25頁(yè)
文件大小： 0K
描述： IC ADC 30MSPS 12BIT LP 28-TSSOP
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 50
位數(shù)： 12
采樣率（每秒）： 30M
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 220mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 28-TSSOP
包裝： 管件
輸入數(shù)目和類型： 1 個(gè)差分，單極
配用： 296-10012-ND - EVALUATION MODULE FOR THS1230
www.ti.com
140
120
100
80
60
40
20
0
0.88
1.76
2.64
3.53
4.41
5.29
6.17
7.05
7.93
8.81
9.69
10.6
1
1.5
12.3
13.2
14.1
15
Power
dBFS
f Frequency MHz
AVDD = DVDD = 3.3 V,
fs = 30 MSPS,
fi = 3.58 MHz, 1 dBFS,
Mode 1 Differential
140
120
100
80
60
40
20
0
0.88
1.76
2.64
3.53
4.41
5.29
6.17
7.05
7.93
8.81
9.69
10.6
1
1.5
12.3
13.2
14.1
15
AVDD = DVDD = 3.3 V,
fs = 30 MSPS,
fi = 3.58 MHz, 1 dBFS,
Mode 2 Differential
Power
dBFS
f Frequency MHz
PRINCIPLES OF OPERATION
Analog Input
THS1230
SLAS291B – OCTOBER 2000 – REVISED MARCH 2004
TYPICAL CHARACTERISTICS (continued)
FAST FOURIER TRANSFORM - MODE 1
Figure 12.
FAST FOURIER TRANSFORM - MODE 2
Figure 13.
The analog input AIN is sampled in the sample and hold unit, the output of which feeds the ADC CORE, where
the process of analog to digital conversion is performed against ADC reference voltages, VREFT and VREFB.
Connecting the EXTREF pin to one of two voltages, DGND or DVDD selects one of the two configurations of ADC
reference generation. The ADC reference voltages come from either the internal reference buffer or completely
external sources. Connect EXTREF to DGND for internal reference generation or to DVDD for external reference
generation.
CON0 and CON1 as described below, select the input configuration mode or place the device in powerdown.
The ADC core drives out through output buffers to the data pins D0 to D11. The output buffers can be disabled
by the OE pin.
A single, sample-rate clock (30 MHz maximum) is required at pin CLK. The analog input signal is sampled on the
rising edge of CLK, and corresponding data is output after the fifth following rising edge.
The THS1230 can operate in differential Mode 1 or differential Mode 2, controlled by the configuration pins
CON0 and CON1 as shown in Table 1. Mode 0 places the device in power-down state or standby for reduced
power consumption.
11
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